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net/mlx5: E-switch, Use PF num in metadata reg c0
Currently only 256 vports can be supported as only 8 bits are reserved for them and 8 bits are reserved for vhca_ids in metadata reg c0. To support more than 256 vports, replace vhca_id with a unique shorter 4-bit PF number which covers upto 16 PF's. Use remaining 12 bits for vports ranging 1-4095. This will continue to generate unique metadata even if multiple PCI devices have same switch_id. Signed-off-by: sunils <sunils@nvidia.com> Reviewed-by: Parav Pandit <parav@nvidia.com> Reviewed-by: Vu Pham <vuhuong@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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2 changed files with 26 additions and 25 deletions
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@ -2019,31 +2019,31 @@ esw_check_vport_match_metadata_supported(const struct mlx5_eswitch *esw)
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u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw)
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{
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u32 num_vports = GENMASK(ESW_VPORT_BITS - 1, 0) - 1;
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u32 vhca_id_mask = GENMASK(ESW_VHCA_ID_BITS - 1, 0);
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u32 vhca_id = MLX5_CAP_GEN(esw->dev, vhca_id);
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u32 start;
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u32 end;
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u32 vport_end_ida = (1 << ESW_VPORT_BITS) - 1;
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u32 max_pf_num = (1 << ESW_PFNUM_BITS) - 1;
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u32 pf_num;
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int id;
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/* Make sure the vhca_id fits the ESW_VHCA_ID_BITS */
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WARN_ON_ONCE(vhca_id >= BIT(ESW_VHCA_ID_BITS));
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/* Only 4 bits of pf_num */
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pf_num = PCI_FUNC(esw->dev->pdev->devfn);
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if (pf_num > max_pf_num)
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return 0;
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/* Trim vhca_id to ESW_VHCA_ID_BITS */
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vhca_id &= vhca_id_mask;
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start = (vhca_id << ESW_VPORT_BITS);
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end = start + num_vports;
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if (!vhca_id)
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start += 1; /* zero is reserved/invalid metadata */
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id = ida_alloc_range(&esw->offloads.vport_metadata_ida, start, end, GFP_KERNEL);
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return (id < 0) ? 0 : id;
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/* Metadata is 4 bits of PFNUM and 12 bits of unique id */
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/* Use only non-zero vport_id (1-4095) for all PF's */
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id = ida_alloc_range(&esw->offloads.vport_metadata_ida, 1, vport_end_ida, GFP_KERNEL);
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if (id < 0)
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return 0;
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id = (pf_num << ESW_VPORT_BITS) | id;
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return id;
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}
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void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata)
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{
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ida_free(&esw->offloads.vport_metadata_ida, metadata);
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u32 vport_bit_mask = (1 << ESW_VPORT_BITS) - 1;
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/* Metadata contains only 12 bits of actual ida id */
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ida_free(&esw->offloads.vport_metadata_ida, metadata & vport_bit_mask);
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}
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static int esw_offloads_vport_metadata_setup(struct mlx5_eswitch *esw,
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@ -74,15 +74,16 @@ bool mlx5_eswitch_reg_c1_loopback_enabled(const struct mlx5_eswitch *esw);
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bool mlx5_eswitch_vport_match_metadata_enabled(const struct mlx5_eswitch *esw);
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/* Reg C0 usage:
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* Reg C0 = < ESW_VHCA_ID_BITS(8) | ESW_VPORT BITS(8) | ESW_CHAIN_TAG(16) >
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* Reg C0 = < ESW_PFNUM_BITS(4) | ESW_VPORT BITS(12) | ESW_CHAIN_TAG(16) >
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*
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* Highest 8 bits of the reg c0 is the vhca_id, next 8 bits is vport_num,
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* the rest (lowest 16 bits) is left for tc chain tag restoration.
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* VHCA_ID + VPORT comprise the SOURCE_PORT matching.
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* Highest 4 bits of the reg c0 is the PF_NUM (range 0-15), 12 bits of
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* unique non-zero vport id (range 1-4095). The rest (lowest 16 bits) is left
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* for tc chain tag restoration.
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* PFNUM + VPORT comprise the SOURCE_PORT matching.
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*/
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#define ESW_VHCA_ID_BITS 8
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#define ESW_VPORT_BITS 8
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#define ESW_SOURCE_PORT_METADATA_BITS (ESW_VHCA_ID_BITS + ESW_VPORT_BITS)
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#define ESW_VPORT_BITS 12
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#define ESW_PFNUM_BITS 4
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#define ESW_SOURCE_PORT_METADATA_BITS (ESW_PFNUM_BITS + ESW_VPORT_BITS)
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#define ESW_SOURCE_PORT_METADATA_OFFSET (32 - ESW_SOURCE_PORT_METADATA_BITS)
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#define ESW_CHAIN_TAG_METADATA_BITS (32 - ESW_SOURCE_PORT_METADATA_BITS)
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#define ESW_CHAIN_TAG_METADATA_MASK GENMASK(ESW_CHAIN_TAG_METADATA_BITS - 1,\
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