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ARC: mm: Move full_page computation into cache version agnostic wrapper
This reduces code duplication in each of cache version specific handlers Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
This commit is contained in:
parent
36b5a51521
commit
7d3d162bbd
1 changed files with 12 additions and 13 deletions
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@ -28,7 +28,7 @@ unsigned long perip_base = ARC_UNCACHED_ADDR_SPACE; /* legacy value for boot */
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unsigned long perip_end = 0xFFFFFFFF; /* legacy value */
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void (*_cache_line_loop_ic_fn)(phys_addr_t paddr, unsigned long vaddr,
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unsigned long sz, const int cacheop);
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unsigned long sz, const int op, const int full_page);
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void (*__dma_cache_wback_inv)(phys_addr_t start, unsigned long sz);
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void (*__dma_cache_inv)(phys_addr_t start, unsigned long sz);
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@ -233,11 +233,10 @@ void read_decode_cache_bcr(void)
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static inline
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void __cache_line_loop_v2(phys_addr_t paddr, unsigned long vaddr,
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unsigned long sz, const int op)
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unsigned long sz, const int op, const int full_page)
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{
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unsigned int aux_cmd;
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int num_lines;
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const int full_page = __builtin_constant_p(sz) && sz == PAGE_SIZE;
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if (op == OP_INV_IC) {
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aux_cmd = ARC_REG_IC_IVIL;
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@ -279,11 +278,10 @@ void __cache_line_loop_v2(phys_addr_t paddr, unsigned long vaddr,
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*/
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static inline
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void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr,
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unsigned long sz, const int op)
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unsigned long sz, const int op, const int full_page)
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{
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unsigned int aux_cmd, aux_tag;
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int num_lines;
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const int full_page = __builtin_constant_p(sz) && sz == PAGE_SIZE;
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if (op == OP_INV_IC) {
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aux_cmd = ARC_REG_IC_IVIL;
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@ -349,17 +347,16 @@ void __cache_line_loop_v3(phys_addr_t paddr, unsigned long vaddr,
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*/
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static inline
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void __cache_line_loop_v4(phys_addr_t paddr, unsigned long vaddr,
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unsigned long sz, const int cacheop)
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unsigned long sz, const int op, const int full_page)
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{
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unsigned int aux_cmd;
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int num_lines;
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const int full_page_op = __builtin_constant_p(sz) && sz == PAGE_SIZE;
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if (cacheop == OP_INV_IC) {
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if (op == OP_INV_IC) {
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aux_cmd = ARC_REG_IC_IVIL;
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} else {
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/* d$ cmd: INV (discard or wback-n-discard) OR FLUSH (wback) */
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aux_cmd = cacheop & OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL;
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aux_cmd = op & OP_INV ? ARC_REG_DC_IVDL : ARC_REG_DC_FLDL;
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}
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/* Ensure we properly floor/ceil the non-line aligned/sized requests
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@ -368,7 +365,7 @@ void __cache_line_loop_v4(phys_addr_t paddr, unsigned long vaddr,
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* -@paddr will be cache-line aligned already (being page aligned)
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* -@sz will be integral multiple of line size (being page sized).
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*/
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if (!full_page_op) {
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if (!full_page) {
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sz += paddr & ~CACHE_LINE_MASK;
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paddr &= CACHE_LINE_MASK;
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}
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@ -381,7 +378,7 @@ void __cache_line_loop_v4(phys_addr_t paddr, unsigned long vaddr,
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* - (and needs to be written before the lower 32 bits)
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*/
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if (is_pae40_enabled()) {
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if (cacheop == OP_INV_IC)
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if (op == OP_INV_IC)
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/*
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* Non aliasing I-cache in HS38,
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* aliasing I-cache handled in __cache_line_loop_v3()
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@ -486,13 +483,14 @@ static void __dc_enable(void)
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static inline void __dc_line_op(phys_addr_t paddr, unsigned long vaddr,
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unsigned long sz, const int op)
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{
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const int full_page = __builtin_constant_p(sz) && sz == PAGE_SIZE;
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unsigned long flags;
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local_irq_save(flags);
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__before_dc_op(op);
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__cache_line_loop(paddr, vaddr, sz, op);
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__cache_line_loop(paddr, vaddr, sz, op, full_page);
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__after_dc_op(op);
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@ -521,10 +519,11 @@ static inline void
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__ic_line_inv_vaddr_local(phys_addr_t paddr, unsigned long vaddr,
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unsigned long sz)
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{
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const int full_page = __builtin_constant_p(sz) && sz == PAGE_SIZE;
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unsigned long flags;
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local_irq_save(flags);
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(*_cache_line_loop_ic_fn)(paddr, vaddr, sz, OP_INV_IC);
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(*_cache_line_loop_ic_fn)(paddr, vaddr, sz, OP_INV_IC, full_page);
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local_irq_restore(flags);
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}
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