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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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V4L/DVB (12135): Add a driver for mt9v011 sensor
Adds driver for mt9v011 based on its datasheet, available at: http://download.micron.com/pdf/datasheets/imaging/MT9V011.pdf The driver was tested with a webcam that will be added on a next patch. Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
parent
b179bc4579
commit
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5 changed files with 402 additions and 0 deletions
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@ -312,6 +312,14 @@ config VIDEO_OV7670
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OV7670 VGA camera. It currently only works with the M88ALP01
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controller.
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config VIDEO_MT9V011
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tristate "Micron mt9v011 sensor support"
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depends on I2C && VIDEO_V4L2
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---help---
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This is a Video4Linux2 sensor-level driver for the Micron
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mt0v011 1.3 Mpixel camera. It currently only works with the
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em28xx driver.
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config VIDEO_TCM825X
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tristate "TCM825x camera sensor support"
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depends on I2C && VIDEO_V4L2
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@ -69,6 +69,7 @@ obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o
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obj-$(CONFIG_VIDEO_OV7670) += ov7670.o
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obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o
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obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o
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obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o
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obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o
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obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o
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355
drivers/media/video/mt9v011.c
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355
drivers/media/video/mt9v011.c
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@ -0,0 +1,355 @@
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/*
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* mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
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*
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* Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
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* This code is placed under the terms of the GNU General Public License v2
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*/
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#include <linux/i2c.h>
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#include <linux/videodev2.h>
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#include <linux/delay.h>
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#include <media/v4l2-device.h>
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#include "mt9v011.h"
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#include <media/v4l2-i2c-drv.h>
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#include <media/v4l2-chip-ident.h>
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MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
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MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
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MODULE_LICENSE("GPL");
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static int debug;
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module_param(debug, int, 0);
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MODULE_PARM_DESC(debug, "Debug level (0-2)");
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/* supported controls */
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static struct v4l2_queryctrl mt9v011_qctrl[] = {
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{
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.id = V4L2_CID_GAIN,
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.type = V4L2_CTRL_TYPE_INTEGER,
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.name = "Gain",
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.minimum = 0,
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.maximum = (1 << 10) - 1,
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.step = 1,
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.default_value = 0x0020,
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.flags = 0,
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}, {
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.id = V4L2_CID_RED_BALANCE,
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.type = V4L2_CTRL_TYPE_INTEGER,
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.name = "Red Balance",
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.minimum = -1 << 9,
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.maximum = (1 << 9) - 1,
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.step = 1,
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.default_value = 0,
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.flags = 0,
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}, {
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.id = V4L2_CID_BLUE_BALANCE,
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.type = V4L2_CTRL_TYPE_INTEGER,
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.name = "Blue Balance",
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.minimum = -1 << 9,
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.maximum = (1 << 9) - 1,
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.step = 1,
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.default_value = 0,
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.flags = 0,
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},
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};
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struct mt9v011 {
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struct v4l2_subdev sd;
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u16 global_gain, red_bal, blue_bal;
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};
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static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
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{
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return container_of(sd, struct mt9v011, sd);
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}
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static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
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{
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struct i2c_client *c = v4l2_get_subdevdata(sd);
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__be16 buffer;
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int rc, val;
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if (1 != (rc = i2c_master_send(c, &addr, 1)))
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v4l2_dbg(0, debug, sd,
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"i2c i/o error: rc == %d (should be 1)\n", rc);
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msleep(10);
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if (2 != (rc = i2c_master_recv(c, (char *)&buffer, 2)))
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v4l2_dbg(0, debug, sd,
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"i2c i/o error: rc == %d (should be 1)\n", rc);
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val = be16_to_cpu(buffer);
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v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
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return val;
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}
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static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
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u16 value)
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{
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struct i2c_client *c = v4l2_get_subdevdata(sd);
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unsigned char buffer[3];
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int rc;
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buffer[0] = addr;
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buffer[1] = value >> 8;
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buffer[2] = value & 0xff;
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v4l2_dbg(2, debug, sd,
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"mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
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if (3 != (rc = i2c_master_send(c, buffer, 3)))
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v4l2_dbg(0, debug, sd,
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"i2c i/o error: rc == %d (should be 3)\n", rc);
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}
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struct i2c_reg_value {
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unsigned char reg;
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u16 value;
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};
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/*
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* Values used at the original driver
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* Some values are marked as Reserved at the datasheet
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*/
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static const struct i2c_reg_value mt9v011_init_default[] = {
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/* guessed meaning - as mt9m111 */
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{ R0D_MT9V011_RESET, 0x0001 },
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{ R0D_MT9V011_RESET, 0x0000 },
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{ R01_MT9V011_ROWSTART, 0x0008 },
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{ R02_MT9V011_COLSTART, 0x0014 },
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{ R03_MT9V011_HEIGHT, 0x01e0 },
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{ R04_MT9V011_WIDTH, 0x0280 },
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{ R05_MT9V011_HBLANK, 0x0001 },
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{ R05_MT9V011_HBLANK, 0x0001 },
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{ R0A_MT9V011_CLK_SPEED, 0x0000 },
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{ R05_MT9V011_HBLANK, 0x000a },
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{ 0x30, 0x0005 },
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{ 0x34, 0x0100 },
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{ 0x3d, 0x068f },
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{ 0x40, 0x01e0 },
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{ 0x52, 0x0100 },
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{ 0x58, 0x0038 }, /* Datasheet default 0x0078 */
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{ 0x59, 0x0723 }, /* Datasheet default 0x0703 */
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{ 0x62, 0x041a }, /* Datasheet default 0x0418 */
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{ R09_MT9V011_SHUTTER_WIDTH, 0x0418 },
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{ R20_MT9V011_READ_MODE, 0x1100 },
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};
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static void set_balance(struct v4l2_subdev *sd)
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{
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struct mt9v011 *core = to_mt9v011(sd);
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u16 green1_gain, green2_gain, blue_gain, red_gain;
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green1_gain = core->global_gain;
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green2_gain = core->global_gain;
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blue_gain = core->global_gain +
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core->global_gain * core->blue_bal / (1 << 9);
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red_gain = core->global_gain +
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core->global_gain * core->blue_bal / (1 << 9);
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mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
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mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
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mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
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mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
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}
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static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
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{
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u16 version;
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int i;
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version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
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if (version != MT9V011_VERSION) {
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v4l2_info(sd, "*** unknown micron chip detected (0x%04x.\n",
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version);
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return -EINVAL;
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}
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for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
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mt9v011_write(sd, mt9v011_init_default[i].reg,
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mt9v011_init_default[i].value);
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set_balance(sd);
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return 0;
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};
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static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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struct mt9v011 *core = to_mt9v011(sd);
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v4l2_dbg(1, debug, sd, "g_ctrl called\n");
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switch (ctrl->id) {
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case V4L2_CID_GAIN:
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ctrl->value = core->global_gain;
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return 0;
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case V4L2_CID_RED_BALANCE:
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ctrl->value = core->red_bal;
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return 0;
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case V4L2_CID_BLUE_BALANCE:
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ctrl->value = core->blue_bal;
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return 0;
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}
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return -EINVAL;
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}
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static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
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{
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struct mt9v011 *core = to_mt9v011(sd);
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u8 i, n;
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n = ARRAY_SIZE(mt9v011_qctrl);
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for (i = 0; i < n; i++) {
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if (ctrl->id != mt9v011_qctrl[i].id)
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continue;
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if (ctrl->value < mt9v011_qctrl[i].minimum ||
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ctrl->value > mt9v011_qctrl[i].maximum)
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return -ERANGE;
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v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
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ctrl->id, ctrl->value);
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break;
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}
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switch (ctrl->id) {
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case V4L2_CID_GAIN:
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core->global_gain = ctrl->value;
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break;
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case V4L2_CID_RED_BALANCE:
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core->red_bal = ctrl->value;
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break;
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case V4L2_CID_BLUE_BALANCE:
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core->blue_bal = ctrl->value;
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break;
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default:
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return -EINVAL;
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}
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set_balance(sd);
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return 0;
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}
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#ifdef CONFIG_VIDEO_ADV_DEBUG
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static int mt9v011_g_register(struct v4l2_subdev *sd,
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struct v4l2_dbg_register *reg)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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if (!v4l2_chip_match_i2c_client(client, ®->match))
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return -EINVAL;
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if (!capable(CAP_SYS_ADMIN))
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return -EPERM;
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reg->val = mt9v011_read(sd, reg->reg & 0xff);
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reg->size = 2;
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return 0;
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}
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static int mt9v011_s_register(struct v4l2_subdev *sd,
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struct v4l2_dbg_register *reg)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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if (!v4l2_chip_match_i2c_client(client, ®->match))
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return -EINVAL;
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if (!capable(CAP_SYS_ADMIN))
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return -EPERM;
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mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
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return 0;
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}
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#endif
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static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
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struct v4l2_dbg_chip_ident *chip)
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{
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struct i2c_client *client = v4l2_get_subdevdata(sd);
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return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
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MT9V011_VERSION);
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}
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static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
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.g_ctrl = mt9v011_g_ctrl,
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.s_ctrl = mt9v011_s_ctrl,
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.reset = mt9v011_reset,
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.g_chip_ident = mt9v011_g_chip_ident,
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#ifdef CONFIG_VIDEO_ADV_DEBUG
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.g_register = mt9v011_g_register,
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.s_register = mt9v011_s_register,
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#endif
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};
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static const struct v4l2_subdev_ops mt9v011_ops = {
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.core = &mt9v011_core_ops,
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};
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/****************************************************************************
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I2C Client & Driver
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****************************************************************************/
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static int mt9v011_probe(struct i2c_client *c,
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const struct i2c_device_id *id)
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{
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struct mt9v011 *core;
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struct v4l2_subdev *sd;
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/* Check if the adapter supports the needed features */
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if (!i2c_check_functionality(c->adapter,
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I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
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return -EIO;
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core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
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if (!core)
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return -ENOMEM;
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core->global_gain = 0x0024;
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sd = &core->sd;
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v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
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v4l_info(c, "chip found @ 0x%02x (%s)\n",
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c->addr << 1, c->adapter->name);
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return 0;
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}
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static int mt9v011_remove(struct i2c_client *c)
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{
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struct v4l2_subdev *sd = i2c_get_clientdata(c);
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v4l2_dbg(1, debug, sd,
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"mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
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c->addr << 1);
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v4l2_device_unregister_subdev(sd);
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kfree(to_mt9v011(sd));
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return 0;
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}
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/* ----------------------------------------------------------------------- */
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static const struct i2c_device_id mt9v011_id[] = {
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{ "mt9v011", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, mt9v011_id);
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static struct v4l2_i2c_driver_data v4l2_i2c_data = {
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.name = "mt9v011",
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.probe = mt9v011_probe,
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.remove = mt9v011_remove,
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.id_table = mt9v011_id,
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};
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35
drivers/media/video/mt9v011.h
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35
drivers/media/video/mt9v011.h
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/*
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* mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
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*
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* Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
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* This code is placed under the terms of the GNU General Public License v2
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*/
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#ifndef MT9V011_H_
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#define MT9V011_H_
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#define R00_MT9V011_CHIP_VERSION 0x00
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#define R01_MT9V011_ROWSTART 0x01
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#define R02_MT9V011_COLSTART 0x02
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#define R03_MT9V011_HEIGHT 0x03
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#define R04_MT9V011_WIDTH 0x04
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#define R05_MT9V011_HBLANK 0x05
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#define R06_MT9V011_VBLANK 0x06
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#define R07_MT9V011_OUT_CTRL 0x07
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#define R09_MT9V011_SHUTTER_WIDTH 0x09
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#define R0A_MT9V011_CLK_SPEED 0x0a
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#define R0B_MT9V011_RESTART 0x0b
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#define R0C_MT9V011_SHUTTER_DELAY 0x0c
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#define R0D_MT9V011_RESET 0x0d
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#define R1E_MT9V011_DIGITAL_ZOOM 0x1e
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#define R20_MT9V011_READ_MODE 0x20
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#define R2B_MT9V011_GREEN_1_GAIN 0x2b
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#define R2C_MT9V011_BLUE_GAIN 0x2c
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#define R2D_MT9V011_RED_GAIN 0x2d
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#define R2E_MT9V011_GREEN_2_GAIN 0x2e
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#define R35_MT9V011_GLOBAL_GAIN 0x35
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#define RF1_MT9V011_CHIP_ENABLE 0xf1
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#define MT9V011_VERSION 0x8243
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#endif
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@ -155,6 +155,9 @@ enum {
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/* module cafe_ccic, just ident 8801 */
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V4L2_IDENT_CAFE = 8801,
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/* module mt9v011, just ident 8243 */
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V4L2_IDENT_MT9V011 = 8243,
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/* module tw9910: just ident 9910 */
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V4L2_IDENT_TW9910 = 9910,
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