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riscv: dts: sifive: add missing #interrupt-cells to pmic 

[ Upstream commit ce6b6d1513 ]

At W=2 dtc complains:
hifive-unmatched-a00.dts:120.10-238.4: Warning (interrupt_provider): /soc/i2c@10030000/pmic@58: Missing '#interrupt-cells' in interrupt provider

Add the missing property.

Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Conor Dooley 2024-02-13 19:45:40 +00:00 committed by Sasha Levin
parent cf71090a59
commit 7e13a78e2b
1 changed files with 1 additions and 0 deletions
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arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
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@ -70,6 +70,7 @@
interrupt-parent = <&gpio>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
regulators {
vdd_bcore1: bcore1 {