Merge branch 'timers-clockevents-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'timers-clockevents-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: hpet: Cleanup the clockevents init and register code x86: Convert PIT to clockevents_config_and_register() clockevents: Provide interface to reconfigure an active clock event device clockevents: Provide combined configure and register function clockevents: Restructure clock_event_device members clocksource: Get rid of the hardcoded 5 seconds sleep time limit clocksource: Restructure clocksource struct members
This commit is contained in:
Linus Torvalds
commit
7e6628e4bc
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@ -217,7 +217,7 @@ static void hpet_reserve_platform_timers(unsigned int id) { }
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/*
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* Common hpet info
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*/
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static unsigned long hpet_period;
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static unsigned long hpet_freq;
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static void hpet_legacy_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt);
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@ -232,7 +232,6 @@ static struct clock_event_device hpet_clockevent = {
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = hpet_legacy_set_mode,
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.set_next_event = hpet_legacy_next_event,
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.shift = 32,
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.irq = 0,
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.rating = 50,
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};
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@ -289,29 +288,13 @@ static void hpet_legacy_clockevent_register(void)
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/* Start HPET legacy interrupts */
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hpet_enable_legacy_int();
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/*
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* The mult factor is defined as (include/linux/clockchips.h)
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* mult/2^shift = cyc/ns (in contrast to ns/cyc in clocksource.h)
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* hpet_period is in units of femtoseconds (per cycle), so
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* mult/2^shift = cyc/ns = 10^6/hpet_period
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* mult = (10^6 * 2^shift)/hpet_period
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* mult = (FSEC_PER_NSEC << hpet_clockevent.shift)/hpet_period
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*/
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hpet_clockevent.mult = div_sc((unsigned long) FSEC_PER_NSEC,
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hpet_period, hpet_clockevent.shift);
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/* Calculate the min / max delta */
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hpet_clockevent.max_delta_ns = clockevent_delta2ns(0x7FFFFFFF,
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&hpet_clockevent);
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/* Setup minimum reprogramming delta. */
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hpet_clockevent.min_delta_ns = clockevent_delta2ns(HPET_MIN_PROG_DELTA,
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&hpet_clockevent);
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/*
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* Start hpet with the boot cpu mask and make it
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* global after the IO_APIC has been initialized.
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*/
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hpet_clockevent.cpumask = cpumask_of(smp_processor_id());
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clockevents_register_device(&hpet_clockevent);
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clockevents_config_and_register(&hpet_clockevent, hpet_freq,
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HPET_MIN_PROG_DELTA, 0x7FFFFFFF);
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global_clock_event = &hpet_clockevent;
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printk(KERN_DEBUG "hpet clockevent registered\n");
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}
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@ -549,7 +532,6 @@ static int hpet_setup_irq(struct hpet_dev *dev)
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static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
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{
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struct clock_event_device *evt = &hdev->evt;
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uint64_t hpet_freq;
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WARN_ON(cpu != smp_processor_id());
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if (!(hdev->flags & HPET_DEV_VALID))
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@ -571,24 +553,10 @@ static void init_one_hpet_msi_clockevent(struct hpet_dev *hdev, int cpu)
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evt->set_mode = hpet_msi_set_mode;
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evt->set_next_event = hpet_msi_next_event;
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evt->shift = 32;
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/*
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* The period is a femto seconds value. We need to calculate the
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* scaled math multiplication factor for nanosecond to hpet tick
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* conversion.
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*/
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hpet_freq = FSEC_PER_SEC;
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do_div(hpet_freq, hpet_period);
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evt->mult = div_sc((unsigned long) hpet_freq,
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NSEC_PER_SEC, evt->shift);
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/* Calculate the max delta */
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evt->max_delta_ns = clockevent_delta2ns(0x7FFFFFFF, evt);
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/* 5 usec minimum reprogramming delta. */
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evt->min_delta_ns = 5000;
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evt->cpumask = cpumask_of(hdev->cpu);
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clockevents_register_device(evt);
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clockevents_config_and_register(evt, hpet_freq, HPET_MIN_PROG_DELTA,
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0x7FFFFFFF);
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}
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#ifdef CONFIG_HPET
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@ -792,7 +760,6 @@ static struct clocksource clocksource_hpet = {
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static int hpet_clocksource_register(void)
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{
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u64 start, now;
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u64 hpet_freq;
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cycle_t t1;
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/* Start the counter */
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@ -819,24 +786,7 @@ static int hpet_clocksource_register(void)
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return -ENODEV;
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}
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/*
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* The definition of mult is (include/linux/clocksource.h)
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* mult/2^shift = ns/cyc and hpet_period is in units of fsec/cyc
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* so we first need to convert hpet_period to ns/cyc units:
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* mult/2^shift = ns/cyc = hpet_period/10^6
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* mult = (hpet_period * 2^shift)/10^6
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* mult = (hpet_period << shift)/FSEC_PER_NSEC
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*/
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/* Need to convert hpet_period (fsec/cyc) to cyc/sec:
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*
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* cyc/sec = FSEC_PER_SEC/hpet_period(fsec/cyc)
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* cyc/sec = (FSEC_PER_NSEC * NSEC_PER_SEC)/hpet_period
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*/
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hpet_freq = FSEC_PER_SEC;
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do_div(hpet_freq, hpet_period);
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clocksource_register_hz(&clocksource_hpet, (u32)hpet_freq);
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return 0;
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}
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@ -845,7 +795,9 @@ static int hpet_clocksource_register(void)
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*/
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int __init hpet_enable(void)
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{
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unsigned long hpet_period;
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unsigned int id;
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u64 freq;
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int i;
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if (!is_hpet_capable())
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@ -883,6 +835,14 @@ int __init hpet_enable(void)
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if (hpet_period < HPET_MIN_PERIOD || hpet_period > HPET_MAX_PERIOD)
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goto out_nohpet;
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/*
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* The period is a femto seconds value. Convert it to a
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* frequency.
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*/
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freq = FSEC_PER_SEC;
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do_div(freq, hpet_period);
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hpet_freq = freq;
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/*
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* Read the HPET ID register to retrieve the IRQ routing
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* information and the number of channels
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@ -93,7 +93,6 @@ static struct clock_event_device pit_ce = {
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = init_pit_timer,
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.set_next_event = pit_next_event,
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.shift = 32,
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.irq = 0,
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};
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@ -108,11 +107,8 @@ void __init setup_pit_timer(void)
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* IO_APIC has been initialized.
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*/
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pit_ce.cpumask = cpumask_of(smp_processor_id());
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pit_ce.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, pit_ce.shift);
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pit_ce.max_delta_ns = clockevent_delta2ns(0x7FFF, &pit_ce);
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pit_ce.min_delta_ns = clockevent_delta2ns(0xF, &pit_ce);
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clockevents_register_device(&pit_ce);
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clockevents_config_and_register(&pit_ce, CLOCK_TICK_RATE, 0xF, 0x7FFF);
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global_clock_event = &pit_ce;
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}
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@ -56,46 +56,52 @@ enum clock_event_nofitiers {
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/**
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* struct clock_event_device - clock event device descriptor
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* @name: ptr to clock event name
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* @features: features
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* @event_handler: Assigned by the framework to be called by the low
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* level handler of the event source
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* @set_next_event: set next event function
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* @next_event: local storage for the next event in oneshot mode
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* @max_delta_ns: maximum delta value in ns
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* @min_delta_ns: minimum delta value in ns
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* @mult: nanosecond to cycles multiplier
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* @shift: nanoseconds to cycles divisor (power of two)
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* @mode: operating mode assigned by the management code
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* @features: features
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* @retries: number of forced programming retries
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* @set_mode: set mode function
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* @broadcast: function to broadcast events
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* @min_delta_ticks: minimum delta value in ticks stored for reconfiguration
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* @max_delta_ticks: maximum delta value in ticks stored for reconfiguration
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* @name: ptr to clock event name
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* @rating: variable to rate clock event devices
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* @irq: IRQ number (only for non CPU local devices)
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* @cpumask: cpumask to indicate for which CPUs this device works
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* @set_next_event: set next event function
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* @set_mode: set mode function
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* @event_handler: Assigned by the framework to be called by the low
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* level handler of the event source
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* @broadcast: function to broadcast events
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* @list: list head for the management code
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* @mode: operating mode assigned by the management code
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* @next_event: local storage for the next event in oneshot mode
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* @retries: number of forced programming retries
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*/
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struct clock_event_device {
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const char *name;
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unsigned int features;
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void (*event_handler)(struct clock_event_device *);
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int (*set_next_event)(unsigned long evt,
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struct clock_event_device *);
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ktime_t next_event;
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u64 max_delta_ns;
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u64 min_delta_ns;
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u32 mult;
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u32 shift;
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enum clock_event_mode mode;
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unsigned int features;
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unsigned long retries;
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void (*broadcast)(const struct cpumask *mask);
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void (*set_mode)(enum clock_event_mode mode,
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struct clock_event_device *);
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unsigned long min_delta_ticks;
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unsigned long max_delta_ticks;
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const char *name;
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int rating;
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int irq;
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const struct cpumask *cpumask;
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int (*set_next_event)(unsigned long evt,
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struct clock_event_device *);
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void (*set_mode)(enum clock_event_mode mode,
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struct clock_event_device *);
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void (*event_handler)(struct clock_event_device *);
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void (*broadcast)(const struct cpumask *mask);
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struct list_head list;
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enum clock_event_mode mode;
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ktime_t next_event;
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unsigned long retries;
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};
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} ____cacheline_aligned;
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/*
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* Calculate a multiplication factor for scaled math, which is used to convert
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@ -122,6 +128,12 @@ extern u64 clockevent_delta2ns(unsigned long latch,
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struct clock_event_device *evt);
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extern void clockevents_register_device(struct clock_event_device *dev);
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extern void clockevents_config_and_register(struct clock_event_device *dev,
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u32 freq, unsigned long min_delta,
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unsigned long max_delta);
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extern int clockevents_update_freq(struct clock_event_device *ce, u32 freq);
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extern void clockevents_exchange_device(struct clock_event_device *old,
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struct clock_event_device *new);
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extern void clockevents_set_mode(struct clock_event_device *dev,
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@ -159,42 +159,38 @@ extern u64 timecounter_cyc2time(struct timecounter *tc,
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*/
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struct clocksource {
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/*
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* First part of structure is read mostly
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* Hotpath data, fits in a single cache line when the
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* clocksource itself is cacheline aligned.
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*/
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const char *name;
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struct list_head list;
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int rating;
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cycle_t (*read)(struct clocksource *cs);
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int (*enable)(struct clocksource *cs);
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void (*disable)(struct clocksource *cs);
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cycle_t cycle_last;
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cycle_t mask;
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u32 mult;
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u32 shift;
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u64 max_idle_ns;
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unsigned long flags;
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cycle_t (*vread)(void);
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void (*suspend)(struct clocksource *cs);
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void (*resume)(struct clocksource *cs);
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#ifdef CONFIG_IA64
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void *fsys_mmio; /* used by fsyscall asm code */
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#define CLKSRC_FSYS_MMIO_SET(mmio, addr) ((mmio) = (addr))
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#else
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#define CLKSRC_FSYS_MMIO_SET(mmio, addr) do { } while (0)
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#endif
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/*
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* Second part is written at each timer interrupt
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* Keep it in a different cache line to dirty no
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* more than one cache line.
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*/
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cycle_t cycle_last ____cacheline_aligned_in_smp;
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const char *name;
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struct list_head list;
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int rating;
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cycle_t (*vread)(void);
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int (*enable)(struct clocksource *cs);
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void (*disable)(struct clocksource *cs);
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unsigned long flags;
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void (*suspend)(struct clocksource *cs);
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void (*resume)(struct clocksource *cs);
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#ifdef CONFIG_CLOCKSOURCE_WATCHDOG
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/* Watchdog related data, used by the framework */
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struct list_head wd_list;
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cycle_t wd_last;
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#endif
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};
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} ____cacheline_aligned;
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/*
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* Clock source flags bits::
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@ -194,6 +194,70 @@ void clockevents_register_device(struct clock_event_device *dev)
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}
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EXPORT_SYMBOL_GPL(clockevents_register_device);
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static void clockevents_config(struct clock_event_device *dev,
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u32 freq)
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{
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unsigned long sec;
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if (!(dev->features & CLOCK_EVT_FEAT_ONESHOT))
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return;
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/*
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* Calculate the maximum number of seconds we can sleep. Limit
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* to 10 minutes for hardware which can program more than
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* 32bit ticks so we still get reasonable conversion values.
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*/
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sec = dev->max_delta_ticks;
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do_div(sec, freq);
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if (!sec)
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sec = 1;
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else if (sec > 600 && dev->max_delta_ticks > UINT_MAX)
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sec = 600;
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clockevents_calc_mult_shift(dev, freq, sec);
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dev->min_delta_ns = clockevent_delta2ns(dev->min_delta_ticks, dev);
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dev->max_delta_ns = clockevent_delta2ns(dev->max_delta_ticks, dev);
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}
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/**
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* clockevents_config_and_register - Configure and register a clock event device
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* @dev: device to register
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* @freq: The clock frequency
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* @min_delta: The minimum clock ticks to program in oneshot mode
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* @max_delta: The maximum clock ticks to program in oneshot mode
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*
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* min/max_delta can be 0 for devices which do not support oneshot mode.
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*/
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void clockevents_config_and_register(struct clock_event_device *dev,
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u32 freq, unsigned long min_delta,
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unsigned long max_delta)
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{
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dev->min_delta_ticks = min_delta;
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dev->max_delta_ticks = max_delta;
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clockevents_config(dev, freq);
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clockevents_register_device(dev);
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}
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/**
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* clockevents_update_freq - Update frequency and reprogram a clock event device.
|
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* @dev: device to modify
|
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* @freq: new device frequency
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*
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* Reconfigure and reprogram a clock event device in oneshot
|
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* mode. Must be called on the cpu for which the device delivers per
|
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* cpu timer events with interrupts disabled! Returns 0 on success,
|
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* -ETIME when the event is in the past.
|
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*/
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int clockevents_update_freq(struct clock_event_device *dev, u32 freq)
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{
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clockevents_config(dev, freq);
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|
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if (dev->mode != CLOCK_EVT_MODE_ONESHOT)
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return 0;
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|
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return clockevents_program_event(dev, dev->next_event, ktime_get());
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}
|
||||
|
||||
/*
|
||||
* Noop handler when we shut down an event device
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -626,19 +626,6 @@ static void clocksource_enqueue(struct clocksource *cs)
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list_add(&cs->list, entry);
|
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}
|
||||
|
||||
|
||||
/*
|
||||
* Maximum time we expect to go between ticks. This includes idle
|
||||
* tickless time. It provides the trade off between selecting a
|
||||
* mult/shift pair that is very precise but can only handle a short
|
||||
* period of time, vs. a mult/shift pair that can handle long periods
|
||||
* of time but isn't as precise.
|
||||
*
|
||||
* This is a subsystem constant, and actual hardware limitations
|
||||
* may override it (ie: clocksources that wrap every 3 seconds).
|
||||
*/
|
||||
#define MAX_UPDATE_LENGTH 5 /* Seconds */
|
||||
|
||||
/**
|
||||
* __clocksource_updatefreq_scale - Used update clocksource with new freq
|
||||
* @t: clocksource to be registered
|
||||
|
|
@ -652,15 +639,28 @@ static void clocksource_enqueue(struct clocksource *cs)
|
|||
*/
|
||||
void __clocksource_updatefreq_scale(struct clocksource *cs, u32 scale, u32 freq)
|
||||
{
|
||||
unsigned long sec;
|
||||
|
||||
/*
|
||||
* Ideally we want to use some of the limits used in
|
||||
* clocksource_max_deferment, to provide a more informed
|
||||
* MAX_UPDATE_LENGTH. But for now this just gets the
|
||||
* register interface working properly.
|
||||
* Calc the maximum number of seconds which we can run before
|
||||
* wrapping around. For clocksources which have a mask > 32bit
|
||||
* we need to limit the max sleep time to have a good
|
||||
* conversion precision. 10 minutes is still a reasonable
|
||||
* amount. That results in a shift value of 24 for a
|
||||
* clocksource with mask >= 40bit and f >= 4GHz. That maps to
|
||||
* ~ 0.06ppm granularity for NTP. We apply the same 12.5%
|
||||
* margin as we do in clocksource_max_deferment()
|
||||
*/
|
||||
sec = (cs->mask - (cs->mask >> 5));
|
||||
do_div(sec, freq);
|
||||
do_div(sec, scale);
|
||||
if (!sec)
|
||||
sec = 1;
|
||||
else if (sec > 600 && cs->mask > UINT_MAX)
|
||||
sec = 600;
|
||||
|
||||
clocks_calc_mult_shift(&cs->mult, &cs->shift, freq,
|
||||
NSEC_PER_SEC/scale,
|
||||
MAX_UPDATE_LENGTH*scale);
|
||||
NSEC_PER_SEC / scale, sec * scale);
|
||||
cs->max_idle_ns = clocksource_max_deferment(cs);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(__clocksource_updatefreq_scale);
|
||||
|
|
|
|||
Loading…
Reference in New Issue