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clk: socfpga: agilex: fix the parents of the psi_ref_clk
commit9d563236cc
upstream. The psi_ref_clk comes from the C2 node of the main_pll and periph_pll, not the C3. Fixes:80c6b7a089
("clk: socfpga: agilex: add clock driver for the Agilex platform") Cc: stable@vger.kernel.org Signed-off-by: Kris Chaplin <kris.chaplin@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20210713144621.605140-1-dinguyen@kernel.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 4 additions and 4 deletions
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@ -107,10 +107,10 @@ static const struct clk_parent_data gpio_db_free_mux[] = {
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};
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static const struct clk_parent_data psi_ref_free_mux[] = {
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{ .fw_name = "main_pll_c3",
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.name = "main_pll_c3", },
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{ .fw_name = "peri_pll_c3",
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.name = "peri_pll_c3", },
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{ .fw_name = "main_pll_c2",
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.name = "main_pll_c2", },
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{ .fw_name = "peri_pll_c2",
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.name = "peri_pll_c2", },
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{ .fw_name = "osc1",
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.name = "osc1", },
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{ .fw_name = "cb-intosc-hs-div2-clk",
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