Apple SoC DT updates for 5.17:

- Separate DTs for all t8103 platforms
 - Add i2c and cd321x nodes
 - Bindings for apple,wdt
 - PMGR bindings and DT updates to instantiate it
 - WiFi MAC address DT handling
 
 This also includes the MAINTAINERS change for the PMGR driver itself, to
 avoid merge issues; the driver will be sent in a different pull.
 
 Manual fixups: Added i2c power domain references to the PMGR DT commit,
 since a prior commit added the i2c nodes.
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Merge tag 'asahi-soc-dt-5.17' of https://github.com/AsahiLinux/linux into arm/dt

Apple SoC DT updates for 5.17:

- Separate DTs for all t8103 platforms
- Add i2c and cd321x nodes
- Bindings for apple,wdt
- PMGR bindings and DT updates to instantiate it
- WiFi MAC address DT handling

This also includes the MAINTAINERS change for the PMGR driver itself, to
avoid merge issues; the driver will be sent in a different pull.

Manual fixups: Added i2c power domain references to the PMGR DT commit,
since a prior commit added the i2c nodes.

* tag 'asahi-soc-dt-5.17' of https://github.com/AsahiLinux/linux:
  arm64: dts: apple: t8103: Expose PCI node for the WiFi MAC address
  arm64: dts: apple: t8103: Add UART2
  arm64: dts: apple: t8103: Add PMGR nodes
  dt-bindings: arm: apple: Add apple,pmgr binding
  dt-bindings: power: Add apple,pmgr-pwrstate binding
  MAINTAINERS: Add PMGR power state files to ARM/APPLE MACHINE
  dt-bindings: watchdog: Add Apple Watchdog
  dt-bindings: interrupt-controller: apple,aic: Add power-domains property
  dt-bindings: pinctrl: apple,pinctrl: Add power-domains property
  dt-bindings: iommu: apple,dart: Add power-domains property
  dt-bindings: i2c: apple,i2c: Add power-domains property
  arm64: dts: apple: t8103: Add cd321x nodes
  arm64: dts: apple: t8103: Add i2c nodes
  arm64: dts: apple: Add missing M1 (t8103) devices
  dt-bindings: arm: apple: Add iMac (24-inch 2021) to Apple bindings
  arm64: dts: apple: add #interrupt-cells property to pinctrl nodes
  dt-bindings: i2c: apple,i2c: allow multiple compatibles
  arm64: dts: apple: change ethernet0 device type to ethernet

Link: https://lore.kernel.org/r/e18b476c-7b1f-de73-53a2-0e21fb5cd283@marcan.st
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-12-13 23:48:57 +01:00
commit 7f0ef89c0f
18 changed files with 1817 additions and 35 deletions

View file

@ -12,12 +12,12 @@ maintainers:
description: |
ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon".
This currently includes devices based on the "M1" SoC, starting with the
three Mac models released in late 2020:
This currently includes devices based on the "M1" SoC:
- Mac mini (M1, 2020)
- MacBook Pro (13-inch, M1, 2020)
- MacBook Air (M1, 2020)
- iMac (24-inch, M1, 2021)
The compatible property should follow this format:
@ -56,6 +56,8 @@ properties:
- apple,j274 # Mac mini (M1, 2020)
- apple,j293 # MacBook Pro (13-inch, M1, 2020)
- apple,j313 # MacBook Air (M1, 2020)
- apple,j456 # iMac (24-inch, 4x USB-C, M1, 2021)
- apple,j457 # iMac (24-inch, 2x USB-C, M1, 2021)
- const: apple,t8103
- const: apple,arm-platform

View file

@ -0,0 +1,134 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/apple/apple,pmgr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple SoC Power Manager (PMGR)
maintainers:
- Hector Martin <marcan@marcan.st>
description: |
Apple SoCs include PMGR blocks responsible for power management,
which can control various clocks, resets, power states, and
performance features. This node represents the PMGR as a syscon,
with sub-nodes representing individual features.
properties:
$nodename:
pattern: "^power-management@[0-9a-f]+$"
compatible:
items:
- enum:
- apple,t8103-pmgr
- apple,t6000-pmgr
- const: apple,pmgr
- const: syscon
- const: simple-mfd
reg:
maxItems: 1
"#address-cells":
const: 1
"#size-cells":
const: 1
patternProperties:
"power-controller@[0-9a-f]+$":
description:
The individual power management domains within this controller
type: object
$ref: /power/apple,pmgr-pwrstate.yaml#
required:
- compatible
- reg
additionalProperties: false
examples:
- |
soc {
#address-cells = <2>;
#size-cells = <2>;
power-management@23b700000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x3b700000 0x0 0x14000>;
ps_sio: power-controller@1c0 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x1c0 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "sio";
apple,always-on;
};
ps_uart_p: power-controller@220 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x220 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart_p";
power-domains = <&ps_sio>;
};
ps_uart0: power-controller@270 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x270 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "uart0";
power-domains = <&ps_uart_p>;
};
};
power-management@23d280000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x3d280000 0x0 0xc000>;
ps_aop_filter: power-controller@4000 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x4000 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_filter";
};
ps_aop_base: power-controller@4010 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x4010 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_base";
power-domains = <&ps_aop_filter>;
};
ps_aop_shim: power-controller@4038 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x4038 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_shim";
power-domains = <&ps_aop_base>;
};
ps_aop_uart0: power-controller@4048 {
compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x4048 8>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "aop_uart0";
power-domains = <&ps_aop_shim>;
};
};
};

View file

@ -20,9 +20,9 @@ allOf:
properties:
compatible:
enum:
- apple,t8103-i2c
- apple,i2c
items:
- const: apple,t8103-i2c
- const: apple,i2c
reg:
maxItems: 1
@ -40,6 +40,9 @@ properties:
used. This frequency is generated by dividing the reference clock.
Allowed values are between ref_clk/(16*4) and ref_clk/(16*255).
power-domains:
maxItems: 1
required:
- compatible
- reg
@ -51,7 +54,7 @@ unevaluatedProperties: false
examples:
- |
i2c@35010000 {
compatible = "apple,t8103-i2c";
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x35010000 0x4000>;
interrupt-parent = <&aic>;
interrupts = <0 627 4>;

View file

@ -65,6 +65,9 @@ properties:
Specifies base physical address and size of the AIC registers.
maxItems: 1
power-domains:
maxItems: 1
required:
- compatible
- '#interrupt-cells'

View file

@ -41,6 +41,9 @@ properties:
Has to be one. The single cell describes the stream id emitted by
a master to the IOMMU.
power-domains:
maxItems: 1
required:
- compatible
- reg

View file

@ -50,6 +50,9 @@ properties:
'#interrupt-cells':
const: 2
power-domains:
maxItems: 1
patternProperties:
'-pins$':
type: object

View file

@ -0,0 +1,71 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/apple,pmgr-pwrstate.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple SoC PMGR Power States
maintainers:
- Hector Martin <marcan@marcan.st>
allOf:
- $ref: "power-domain.yaml#"
description: |
Apple SoCs include PMGR blocks responsible for power management,
which can control various clocks, resets, power states, and
performance features. This binding describes the device power
state registers, which control power states and resets.
Each instance of a power controller within the PMGR syscon node
represents a generic power domain provider, as documented in
Documentation/devicetree/bindings/power/power-domain.yaml.
The provider controls a single SoC block. The power hierarchy is
represented via power-domains relationships between these nodes.
See Documentation/devicetree/bindings/arm/apple/apple,pmgr.yaml
for the top-level PMGR node documentation.
properties:
compatible:
items:
- enum:
- apple,t8103-pmgr-pwrstate
- apple,t6000-pmgr-pwrstate
- const: apple,pmgr-pwrstate
reg:
maxItems: 1
"#power-domain-cells":
const: 0
"#reset-cells":
const: 0
power-domains:
description:
Reference to parent power domains. A domain may have multiple parents,
and all will be powered up when it is powered.
minItems: 1
maxItems: 8 # Arbitrary, should be enough
label:
description:
Specifies the name of the SoC domain being controlled. This is used to
name the power/reset domains.
apple,always-on:
description:
Forces this power domain to always be powered up.
type: boolean
required:
- compatible
- reg
- "#power-domain-cells"
- "#reset-cells"
- label
additionalProperties: false

View file

@ -0,0 +1,52 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/watchdog/apple,wdt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple SoC Watchdog
allOf:
- $ref: "watchdog.yaml#"
maintainers:
- Sven Peter <sven@svenpeter.dev>
properties:
compatible:
items:
- enum:
- apple,t8103-wdt
- apple,t6000-wdt
- const: apple,wdt
reg:
maxItems: 1
clocks:
maxItems: 1
interrupts:
maxItems: 1
required:
- compatible
- reg
- clocks
- interrupts
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
wdt: watchdog@50000000 {
compatible = "apple,t8103-wdt", "apple,wdt";
reg = <0x50000000 0x4000>;
clocks = <&clk>;
interrupts = <AIC_IRQ 123 IRQ_TYPE_LEVEL_HIGH>;
};
...

View file

@ -1745,17 +1745,21 @@ B: https://github.com/AsahiLinux/linux/issues
C: irc://irc.oftc.net/asahi-dev
T: git https://github.com/AsahiLinux/linux.git
F: Documentation/devicetree/bindings/arm/apple.yaml
F: Documentation/devicetree/bindings/arm/apple/*
F: Documentation/devicetree/bindings/i2c/apple,i2c.yaml
F: Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
F: Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
F: Documentation/devicetree/bindings/pci/apple,pcie.yaml
F: Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
F: Documentation/devicetree/bindings/power/apple*
F: Documentation/devicetree/bindings/watchdog/apple,wdt.yaml
F: arch/arm64/boot/dts/apple/
F: drivers/i2c/busses/i2c-pasemi-core.c
F: drivers/i2c/busses/i2c-pasemi-platform.c
F: drivers/irqchip/irq-apple-aic.c
F: drivers/mailbox/apple-mailbox.c
F: drivers/pinctrl/pinctrl-apple-gpio.c
F: drivers/soc/apple/*
F: include/dt-bindings/interrupt-controller/apple-aic.h
F: include/dt-bindings/pinctrl/apple.h
F: include/linux/apple-mailbox.h

View file

@ -1,2 +1,6 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_APPLE) += t8103-j274.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j293.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j313.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j456.dtb
dtb-$(CONFIG_ARCH_APPLE) += t8103-j457.dtb

View file

@ -10,39 +10,15 @@
/dts-v1/;
#include "t8103.dtsi"
#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j274", "apple,t8103", "apple,arm-platform";
model = "Apple Mac mini (M1, 2020)";
aliases {
serial0 = &serial0;
ethernet0 = &ethernet0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0x2 0>; /* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
/*
@ -50,9 +26,6 @@ &serial0 {
* on-board devices and properties that are populated by the bootloader
* (such as MAC addresses).
*/
&port00 {
bus-range = <1 1>;
};
&port01 {
bus-range = <2 2>;
@ -60,9 +33,13 @@ &port01 {
&port02 {
bus-range = <3 3>;
ethernet0: pci@0,0 {
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 00];
};
};
&i2c2 {
status = "okay";
};

View file

@ -0,0 +1,41 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple MacBook Pro (13-inch, M1, 2020)
*
* target-type: J293
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t8103.dtsi"
#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j293", "apple,t8103", "apple,arm-platform";
model = "Apple MacBook Pro (13-inch, M1, 2020)";
};
/*
* Remove unused PCIe ports and disable the associated DARTs.
*/
&pcie0_dart_1 {
status = "disabled";
};
&pcie0_dart_2 {
status = "disabled";
};
/delete-node/ &port01;
/delete-node/ &port02;
&i2c2 {
status = "okay";
};
&i2c4 {
status = "okay";
};

View file

@ -0,0 +1,33 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple MacBook Air (M1, 2020)
*
* target-type: J313
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t8103.dtsi"
#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j313", "apple,t8103", "apple,arm-platform";
model = "Apple MacBook Air (M1, 2020)";
};
/*
* Remove unused PCIe ports and disable the associated DARTs.
*/
&pcie0_dart_1 {
status = "disabled";
};
&pcie0_dart_2 {
status = "disabled";
};
/delete-node/ &port01;
/delete-node/ &port02;

View file

@ -0,0 +1,59 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iMac (24-inch, 4x USB-C, M1, 2020)
*
* target-type: J456
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t8103.dtsi"
#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j456", "apple,t8103", "apple,arm-platform";
model = "Apple iMac (24-inch, 4x USB-C, M1, 2020)";
aliases {
ethernet0 = &ethernet0;
};
};
&i2c0 {
hpm2: usb-pd@3b {
compatible = "apple,cd321x";
reg = <0x3b>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
hpm3: usb-pd@3c {
compatible = "apple,cd321x";
reg = <0x3c>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
};
/*
* Force the bus number assignments so that we can declare some of the
* on-board devices and properties that are populated by the bootloader
* (such as MAC addresses).
*/
&port01 {
bus-range = <2 2>;
};
&port02 {
bus-range = <3 3>;
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 00];
};
};

View file

@ -0,0 +1,47 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple iMac (24-inch, 2x USB-C, M1, 2020)
*
* target-type: J457
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t8103.dtsi"
#include "t8103-jxxx.dtsi"
/ {
compatible = "apple,j457", "apple,t8103", "apple,arm-platform";
model = "Apple iMac (24-inch, 2x USB-C, M1, 2020)";
aliases {
ethernet0 = &ethernet0;
};
};
/*
* Force the bus number assignments so that we can declare some of the
* on-board devices and properties that are populated by the bootloader
* (such as MAC addresses).
*/
&port02 {
bus-range = <3 3>;
ethernet0: ethernet@0,0 {
reg = <0x30000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 10 18 00 00 00];
};
};
/*
* Remove unused PCIe port and disable the associated DART.
*/
&pcie0_dart_1 {
status = "disabled";
};
/delete-node/ &port01;

View file

@ -0,0 +1,78 @@
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple M1 Mac mini, MacBook Air/Pro, iMac 24" (M1, 2020/2021)
*
* This file contains parts common to all Apple M1 devices using the t8103.
*
* target-type: J274, J293, J313, J456, J457
*
* Copyright The Asahi Linux Contributors
*/
/ {
aliases {
serial0 = &serial0;
serial2 = &serial2;
wifi0 = &wifi0;
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
stdout-path = "serial0";
framebuffer0: framebuffer@0 {
compatible = "apple,simple-framebuffer", "simple-framebuffer";
reg = <0 0 0 0>; /* To be filled by loader */
/* Format properties will be added by loader */
status = "disabled";
};
};
memory@800000000 {
device_type = "memory";
reg = <0x8 0 0x2 0>; /* To be filled by loader */
};
};
&serial0 {
status = "okay";
};
&serial2 {
status = "okay";
};
&i2c0 {
hpm0: usb-pd@38 {
compatible = "apple,cd321x";
reg = <0x38>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
hpm1: usb-pd@3f {
compatible = "apple,cd321x";
reg = <0x3f>;
interrupt-parent = <&pinctrl_ap>;
interrupts = <106 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "irq";
};
};
/*
* Force the bus number assignments so that we can declare some of the
* on-board devices and properties that are populated by the bootloader
* (such as MAC addresses).
*/
&port00 {
bus-range = <1 1>;
wifi0: network@0,0 {
reg = <0x10000 0x0 0x0 0x0 0x0>;
/* To be filled by the loader */
local-mac-address = [00 00 00 00 00 00];
};
};

File diff suppressed because it is too large Load diff

View file

@ -111,6 +111,73 @@ soc {
ranges;
nonposted-mmio;
i2c0: i2c@235010000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35010000 0x0 0x4000>;
clocks = <&clk24>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c0_pins>;
pinctrl-names = "default";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <&ps_i2c0>;
};
i2c1: i2c@235014000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35014000 0x0 0x4000>;
clocks = <&clk24>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <&ps_i2c1>;
};
i2c2: i2c@235018000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35018000 0x0 0x4000>;
clocks = <&clk24>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default";
#address-cells = <0x1>;
#size-cells = <0x0>;
status = "disabled"; /* not used in all devices */
power-domains = <&ps_i2c2>;
};
i2c3: i2c@23501c000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x3501c000 0x0 0x4000>;
clocks = <&clk24>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c3_pins>;
pinctrl-names = "default";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <&ps_i2c3>;
};
i2c4: i2c@235020000 {
compatible = "apple,t8103-i2c", "apple,i2c";
reg = <0x2 0x35020000 0x0 0x4000>;
clocks = <&clk24>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-0 = <&i2c4_pins>;
pinctrl-names = "default";
#address-cells = <0x1>;
#size-cells = <0x0>;
power-domains = <&ps_i2c4>;
status = "disabled"; /* only used in J293 */
};
serial0: serial@235200000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x35200000 0x0 0x1000>;
@ -123,6 +190,19 @@ serial0: serial@235200000 {
*/
clocks = <&clk24>, <&clk24>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart0>;
status = "disabled";
};
serial2: serial@235208000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x35208000 0x0 0x1000>;
reg-io-width = <4>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk24>, <&clk24>;
clock-names = "uart", "clk_uart_baud0";
power-domains = <&ps_uart2>;
status = "disabled";
};
@ -131,11 +211,20 @@ aic: interrupt-controller@23b100000 {
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x2 0x3b100000 0x0 0x8000>;
power-domains = <&ps_aic>;
};
pmgr: power-management@23b700000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x3b700000 0 0x14000>;
};
pinctrl_ap: pinctrl@23c100000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x3c100000 0x0 0x100000>;
power-domains = <&ps_gpio>;
gpio-controller;
#gpio-cells = <2>;
@ -143,6 +232,7 @@ pinctrl_ap: pinctrl@23c100000 {
apple,npins = <212>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
@ -152,6 +242,31 @@ pinctrl_ap: pinctrl@23c100000 {
<AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
i2c0_pins: i2c0-pins {
pinmux = <APPLE_PINMUX(192, 1)>,
<APPLE_PINMUX(188, 1)>;
};
i2c1_pins: i2c1-pins {
pinmux = <APPLE_PINMUX(201, 1)>,
<APPLE_PINMUX(199, 1)>;
};
i2c2_pins: i2c2-pins {
pinmux = <APPLE_PINMUX(163, 1)>,
<APPLE_PINMUX(162, 1)>;
};
i2c3_pins: i2c3-pins {
pinmux = <APPLE_PINMUX(73, 1)>,
<APPLE_PINMUX(72, 1)>;
};
i2c4_pins: i2c4-pins {
pinmux = <APPLE_PINMUX(135, 1)>,
<APPLE_PINMUX(134, 1)>;
};
pcie_pins: pcie-pins {
pinmux = <APPLE_PINMUX(150, 1)>,
<APPLE_PINMUX(151, 1)>,
@ -159,6 +274,13 @@ pcie_pins: pcie-pins {
};
};
pmgr_mini: power-management@23d280000 {
compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2 0x3d280000 0 0x4000>;
};
pinctrl_aop: pinctrl@24a820000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x4a820000 0x0 0x4000>;
@ -169,6 +291,7 @@ pinctrl_aop: pinctrl@24a820000 {
apple,npins = <42>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
@ -182,6 +305,7 @@ pinctrl_aop: pinctrl@24a820000 {
pinctrl_nub: pinctrl@23d1f0000 {
compatible = "apple,t8103-pinctrl", "apple,pinctrl";
reg = <0x2 0x3d1f0000 0x0 0x4000>;
power-domains = <&ps_nub_gpio>;
gpio-controller;
#gpio-cells = <2>;
@ -189,6 +313,7 @@ pinctrl_nub: pinctrl@23d1f0000 {
apple,npins = <23>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
@ -209,6 +334,7 @@ pinctrl_smc: pinctrl@23e820000 {
apple,npins = <16>;
interrupt-controller;
#interrupt-cells = <2>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
<AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
@ -225,6 +351,7 @@ pcie0_dart_0: dart@681008000 {
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp>;
};
pcie0_dart_1: dart@682008000 {
@ -233,6 +360,7 @@ pcie0_dart_1: dart@682008000 {
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp>;
};
pcie0_dart_2: dart@683008000 {
@ -241,6 +369,7 @@ pcie0_dart_2: dart@683008000 {
#iommu-cells = <1>;
interrupt-parent = <&aic>;
interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&ps_apcie_gp>;
};
pcie0: pcie@690000000 {
@ -275,6 +404,7 @@ pcie0: pcie@690000000 {
ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
<0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
power-domains = <&ps_apcie_gp>;
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";
@ -340,3 +470,5 @@ port02: pci@2,0 {
};
};
};
#include "t8103-pmgr.dtsi"