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drm/rockchip: fix clk enable disable mismatch in vop_crtc_mode_set
The function disables the dclk at the beginning, so don't simply return when an error happens, but instead enable the clock again, so that enable and disable calls are balanced. ret_clk is introduced to hold the clk_enable result and not mangle the original error code. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
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parent
502e95c667
commit
7f53fbba3c
1 changed files with 10 additions and 8 deletions
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@ -893,7 +893,7 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
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u16 vsync_len = adjusted_mode->vsync_end - adjusted_mode->vsync_start;
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u16 vact_st = adjusted_mode->vtotal - adjusted_mode->vsync_start;
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u16 vact_end = vact_st + vdisplay;
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int ret;
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int ret, ret_clk;
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uint32_t val;
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/*
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@ -915,7 +915,8 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
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default:
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DRM_ERROR("unsupport connector_type[%d]\n",
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vop->connector_type);
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return -EINVAL;
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ret = -EINVAL;
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goto out;
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};
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VOP_CTRL_SET(vop, out_mode, vop->connector_out_mode);
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@ -938,7 +939,7 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
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ret = vop_crtc_mode_set_base(crtc, x, y, fb);
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if (ret)
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return ret;
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goto out;
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/*
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* reset dclk, take all mode config affect, so the clk would run in
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@ -949,13 +950,14 @@ static int vop_crtc_mode_set(struct drm_crtc *crtc,
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reset_control_deassert(vop->dclk_rst);
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clk_set_rate(vop->dclk, adjusted_mode->clock * 1000);
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ret = clk_enable(vop->dclk);
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if (ret < 0) {
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dev_err(vop->dev, "failed to enable dclk - %d\n", ret);
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return ret;
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out:
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ret_clk = clk_enable(vop->dclk);
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if (ret_clk < 0) {
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dev_err(vop->dev, "failed to enable dclk - %d\n", ret_clk);
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return ret_clk;
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}
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return 0;
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return ret;
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}
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static void vop_crtc_commit(struct drm_crtc *crtc)
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