mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-12 13:55:32 +00:00
Fixes for omaps with the most intrusive stuff being read-only data
assembly fixes, the other things are mostly board related: - A series of omap assembly code fixes to fix issues with rodata with ARM_KERNMEM_PERMS enabled. We had several places writing to rodata, which is bad. The fix in most cases is to load the value from data section using a pointer. Let's also enable ARM_KERNMEM_PERMS so DEBUG_RODATA gets selected by default. And while testing things, I also added few more loadable driver modules to the defconfig that I seem to need quite often. - Fix a long standing omap5 RTC mystery and enable RTC where we need to ensure the SoC msecure pin is high so we can write to the RTC registers. - Fix irq types for am437x - A series of minor dts fixes for sbc-am57x and cl-som-am57x - Fixes for torpedo dts to make WLAN behave and to remove a duplicate i2c rate entry This series also includes few minor changes that are not stricly fixes, but would be good to get in during the early -rc cycle: - Remove legacy mailbox platform data that is no longer needed - Add the pdata-quirks needed for the new pwm-omap-dmtimer so people can use it - Enable ti,mbox-send-noirq that's needed by wkup_m3 driver - Enable SPLIT and DWARF4 in omap2plus_defconfig as it makes the initramfs quite a bit smaller -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWqT5XAAoJEBvUPslcq6Vz01kP/jdo4hXcvUgtG9W5yIxortiK Sg2D0omkQzwgNHhh9K/ezOYaGwgRJ8grEkCYImlr7n/zGr7Mpt3eUiJC7gbV8xg4 nEPNxGoIQSQ3A0NVV+6gtnHHco4ajih/l7A+0UDZy/x375VExW46HS0KLWy2hov9 WgEJDNBIZBdBN3S3CJ2pO1+I4KHkk9vqaDHjfDaSnyQXRKxQTziubnk5KhfcYpMS 0fDY9BqJFDp0gbE3Dp3GOk/eEW+6XQAUFxK2i+rp3fmOhENBbbEAPWJ4qM8VFQr+ ITQdd2o/SXE3hnqoXLMpCBFPSBDD7UMoxIp3gtMu/YwRePw8zETeQKYuHwSO69oz BKoKXJKg1WfiTquCzwijlqvOhMi0KzVSBi+X5MSQaUl+30qrHXdY4ecHvQAzp9vZ OtkCLI5SLmxCRLQllssifey91IfaWEm01So/XgvSgqUVfTLrUcBU5emlgwK5NMy5 ya6NsOu0ME9k6GuGCWupGnVpUHlIAj4e60xisiVYI9GP4sN8aCey/RiOR+rWZW+C YYYxttRqRlwKH1VHNow0aWCG15hNjWGW8XWCSNyJeCCigObEwQxBE1xfAwGeGZ5s FA+ogfZesvPu/u1ychgF1e0w30P9AnWhTt1dTR7TNxLBqFsrbhWz+r0jOTzrlYaR 6l2eMQYPlQ4569rGIbdF =NqvQ -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.5/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps with the most intrusive stuff being read-only data assembly fixes, the other things are mostly board related: - A series of omap assembly code fixes to fix issues with rodata with ARM_KERNMEM_PERMS enabled. We had several places writing to rodata, which is bad. The fix in most cases is to load the value from data section using a pointer. Let's also enable ARM_KERNMEM_PERMS so DEBUG_RODATA gets selected by default. And while testing things, I also added few more loadable driver modules to the defconfig that I seem to need quite often. - Fix a long standing omap5 RTC mystery and enable RTC where we need to ensure the SoC msecure pin is high so we can write to the RTC registers. - Fix irq types for am437x - A series of minor dts fixes for sbc-am57x and cl-som-am57x - Fixes for torpedo dts to make WLAN behave and to remove a duplicate i2c rate entry This series also includes few minor changes that are not stricly fixes, but would be good to get in during the early -rc cycle: - Remove legacy mailbox platform data that is no longer needed - Add the pdata-quirks needed for the new pwm-omap-dmtimer so people can use it - Enable ti,mbox-send-noirq that's needed by wkup_m3 driver - Enable SPLIT and DWARF4 in omap2plus_defconfig as it makes the initramfs quite a bit smaller * tag 'omap-for-v4.5/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (23 commits) ARM: dts: am57xx: sbc-am57x: correct Eth PHY settings ARM: dts: am57xx: cl-som-am57x: fix CPSW EMAC pinmux ARM: dts: am57xx: sbc-am57x: fix UART3 pinmux ARM: dts: am57xx: cl-som-am57x: update SPI Flash frequency ARM: dts: am57xx: cl-som-am57x: set HOST mode for USB2 ARM: dts: am57xx: sbc-am57x: fix SB-SOM EEPROM I2C address ARM: dts: LogicPD Torpedo: Revert Duplicative Entries ARM: dts: am437x: pixcir_tangoc: use correct flags for irq types ARM: dts: am4372: fix irq type for arm twd and global timer ARM: dts: Fix wl12xx missing clocks that cause hangs ARM: OMAP: Add PWM dmtimer platform data quirks ARM: omap2plus_defconfig: Enable ARM_KERNMEM_PERMS and few loadable modules ARM: OMAP2+: Fix ppa_zero_params and ppa_por_params for rodata ARM: OMAP2+: Fix l2_inv_api_params for rodata ARM: OMAP2+: Fix save_secure_ram_context for rodata ARM: OMAP2+: Fix l2dis_3630 for rodata ARM: OMAP2+: Fix wait_dll_lock_timed for rodata ARM: OMAP2+: Remove legacy mailbox device instantiation ARM: dts: AM4372: Add ti,mbox-send-noirq to wkup_m3 mailbox ARM: dts: AM33xx: Add ti,mbox-send-noirq to wkup_m3 mailbox ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
7f7420f07e
13 changed files with 130 additions and 91 deletions
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@ -439,6 +439,7 @@ mailbox: mailbox@480C8000 {
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <8>;
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mbox_wkupm3: wkup_m3 {
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ti,mbox-send-noirq;
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ti,mbox-tx = <0 0 0>;
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ti,mbox-rx = <0 0 3>;
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};
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@ -73,7 +73,7 @@ scu: scu@48240000 {
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global_timer: timer@48240200 {
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compatible = "arm,cortex-a9-global-timer";
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reg = <0x48240200 0x100>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&gic>;
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clocks = <&mpu_periphclk>;
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};
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@ -81,7 +81,7 @@ global_timer: timer@48240200 {
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local_timer: timer@48240600 {
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compatible = "arm,cortex-a9-twd-timer";
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reg = <0x48240600 0x100>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>;
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interrupt-parent = <&gic>;
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clocks = <&mpu_periphclk>;
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};
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@ -290,6 +290,7 @@ mailbox: mailbox@480C8000 {
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ti,mbox-num-users = <4>;
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ti,mbox-num-fifos = <8>;
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mbox_wkupm3: wkup_m3 {
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ti,mbox-send-noirq;
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ti,mbox-tx = <0 0 0>;
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ti,mbox-rx = <0 0 3>;
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};
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@ -590,8 +590,6 @@ pixcir_ts@5c {
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pinctrl-names = "default";
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pinctrl-0 = <&pixcir_ts_pins>;
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reg = <0x5c>;
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interrupt-parent = <&gpio3>;
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interrupts = <22 0>;
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attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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@ -599,7 +597,7 @@ pixcir_ts@5c {
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* 0x264 represents the offset of padconf register of
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* gpio3_22 from am43xx_pinmux base.
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*/
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interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>,
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interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>,
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<&am43xx_pinmux 0x264>;
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interrupt-names = "tsc", "wakeup";
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@ -491,7 +491,7 @@ pixcir_ts@5c {
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pinctrl-0 = <&pixcir_ts_pins>;
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reg = <0x5c>;
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interrupt-parent = <&gpio1>;
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interrupts = <17 0>;
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interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
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attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
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@ -167,7 +167,7 @@ DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d19.rgmii1_rc
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DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
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DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
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DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
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DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
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DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
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>;
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};
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@ -492,14 +492,14 @@ &qspi {
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pinctrl-names = "default";
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pinctrl-0 = <&qspi1_pins>;
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spi-max-frequency = <20000000>;
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spi-max-frequency = <48000000>;
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spi_flash: spi_flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>; /* CS0 */
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spi-max-frequency = <20000000>;
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spi-max-frequency = <48000000>;
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partition@0 {
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label = "uboot";
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@ -559,13 +559,13 @@ &mac {
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <0>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <1>;
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phy-mode = "rgmii";
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phy-mode = "rgmii-txid";
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dual_emac_res_vlan = <1>;
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};
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@ -588,7 +588,7 @@ &usb1 {
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};
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&usb2 {
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dr_mode = "peripheral";
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dr_mode = "host";
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};
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&mcasp3 {
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@ -25,8 +25,8 @@ aliases {
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&dra7_pmx_core {
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uart3_pins_default: uart3_pins_default {
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pinctrl-single,pins = <
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DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */
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DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */
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DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */
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DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */
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>;
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};
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@ -108,9 +108,9 @@ &i2c5 {
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pinctrl-0 = <&i2c5_pins_default>;
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clock-frequency = <400000>;
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eeprom_base: atmel@50 {
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eeprom_base: atmel@54 {
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compatible = "atmel,24c08";
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reg = <0x50>;
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reg = <0x54>;
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pagesize = <16>;
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};
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@ -112,14 +112,6 @@ &i2c3 {
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clock-frequency = <400000>;
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};
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&i2c2 {
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clock-frequency = <400000>;
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};
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&i2c3 {
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clock-frequency = <400000>;
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};
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/*
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* Only found on the wireless SOM. For the SOM without wireless, the pins for
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* MMC3 can be routed with jumpers to the second MMC slot on the devkit and
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@ -143,6 +135,7 @@ wlcore: wlcore@2 {
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interrupt-parent = <&gpio5>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
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ref-clock-frequency = <26000000>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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@ -130,6 +130,16 @@ sound: sound {
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};
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};
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&gpio8 {
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/* TI trees use GPIO instead of msecure, see also muxing */
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p234 {
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gpio-hog;
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gpios = <10 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "gpio8_234/msecure";
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};
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};
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&omap5_pmx_core {
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pinctrl-names = "default";
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pinctrl-0 = <
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@ -213,6 +223,13 @@ OMAP5_IOPAD(0x1bc, PIN_OUTPUT | MUX_MODE6) /* mcspi1_clk.gpio5_140 */
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>;
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};
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/* TI trees use GPIO mode; msecure mode does not work reliably? */
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palmas_msecure_pins: palmas_msecure_pins {
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pinctrl-single,pins = <
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OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */
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>;
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};
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usbhost_pins: pinmux_usbhost_pins {
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pinctrl-single,pins = <
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OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
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@ -278,6 +295,12 @@ &omap5_pmx_wkup {
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&usbhost_wkup_pins
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>;
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palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins {
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pinctrl-single,pins = <
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OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */
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>;
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};
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usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
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pinctrl-single,pins = <
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OMAP5_IOPAD(0x05a, PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
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@ -345,6 +368,8 @@ palmas: palmas@48 {
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interrupt-controller;
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#interrupt-cells = <2>;
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ti,system-power-controller;
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pinctrl-names = "default";
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pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
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extcon_usb3: palmas_usb {
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compatible = "ti,palmas-usb-vid";
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@ -358,6 +383,14 @@ clk32kgaudio: palmas_clk32k@1 {
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#clock-cells = <0>;
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};
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rtc {
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compatible = "ti,palmas-rtc";
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interrupt-parent = <&palmas>;
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interrupts = <8 IRQ_TYPE_NONE>;
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ti,backup-battery-chargeable;
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ti,backup-battery-charge-high-current;
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};
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palmas_pmic {
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compatible = "ti,palmas-pmic";
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interrupt-parent = <&palmas>;
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@ -50,6 +50,7 @@ CONFIG_SOC_AM33XX=y
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CONFIG_SOC_AM43XX=y
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CONFIG_SOC_DRA7XX=y
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CONFIG_ARM_THUMBEE=y
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CONFIG_ARM_KERNMEM_PERMS=y
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CONFIG_ARM_ERRATA_411920=y
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CONFIG_ARM_ERRATA_430973=y
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CONFIG_SMP=y
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@ -177,6 +178,7 @@ CONFIG_TI_CPTS=y
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CONFIG_AT803X_PHY=y
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CONFIG_SMSC_PHY=y
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CONFIG_USB_USBNET=m
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CONFIG_USB_NET_SMSC75XX=m
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CONFIG_USB_NET_SMSC95XX=m
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CONFIG_USB_ALI_M5632=y
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CONFIG_USB_AN2720=y
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@ -354,6 +356,11 @@ CONFIG_USB_MUSB_DSPS=m
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CONFIG_USB_INVENTRA_DMA=y
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CONFIG_USB_TI_CPPI41_DMA=y
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CONFIG_USB_DWC3=m
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CONFIG_USB_SERIAL=m
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CONFIG_USB_SERIAL_GENERIC=y
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CONFIG_USB_SERIAL_SIMPLE=m
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CONFIG_USB_SERIAL_FTDI_SIO=m
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CONFIG_USB_SERIAL_PL2303=m
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CONFIG_USB_TEST=m
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CONFIG_AM335X_PHY_USB=y
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CONFIG_USB_GADGET=m
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@ -387,6 +394,7 @@ CONFIG_NEW_LEDS=y
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CONFIG_LEDS_CLASS=m
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CONFIG_LEDS_GPIO=m
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CONFIG_LEDS_PWM=m
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CONFIG_LEDS_PCA963X=m
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CONFIG_LEDS_TRIGGERS=y
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CONFIG_LEDS_TRIGGER_TIMER=m
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CONFIG_LEDS_TRIGGER_ONESHOT=m
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@ -449,6 +457,8 @@ CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_PRINTK_TIME=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_INFO_SPLIT=y
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CONFIG_DEBUG_INFO_DWARF4=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_SCHEDSTATS=y
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CONFIG_TIMER_STATS=y
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@ -18,7 +18,6 @@
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#include <linux/slab.h>
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#include <linux/of.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_data/mailbox-omap.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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@ -66,32 +65,6 @@ static int __init omap3_l3_init(void)
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}
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omap_postcore_initcall(omap3_l3_init);
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#if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE)
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static inline void __init omap_init_mbox(void)
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{
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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struct omap_mbox_pdata *pdata;
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oh = omap_hwmod_lookup("mailbox");
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if (!oh) {
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pr_err("%s: unable to find hwmod\n", __func__);
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return;
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}
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if (!oh->dev_attr) {
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pr_err("%s: hwmod doesn't have valid attrs\n", __func__);
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return;
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}
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pdata = (struct omap_mbox_pdata *)oh->dev_attr;
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pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata));
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WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n",
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__func__, PTR_ERR(pdev));
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}
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#else
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static inline void omap_init_mbox(void) { }
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#endif /* CONFIG_OMAP2PLUS_MBOX */
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static inline void omap_init_sti(void) {}
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#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
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|
@ -229,7 +202,6 @@ static int __init omap2_init_devices(void)
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* please keep these calls, and their implementations above,
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* in alphabetical order so they're easier to sort through.
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*/
|
||||
omap_init_mbox();
|
||||
omap_init_mcspi();
|
||||
omap_init_sham();
|
||||
omap_init_aes();
|
||||
|
|
|
@ -23,6 +23,8 @@
|
|||
#include <linux/platform_data/pinctrl-single.h>
|
||||
#include <linux/platform_data/iommu-omap.h>
|
||||
#include <linux/platform_data/wkup_m3.h>
|
||||
#include <linux/platform_data/pwm_omap_dmtimer.h>
|
||||
#include <plat/dmtimer.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "common-board-devices.h"
|
||||
|
@ -449,6 +451,24 @@ void omap_auxdata_legacy_init(struct device *dev)
|
|||
dev->platform_data = &twl_gpio_auxdata;
|
||||
}
|
||||
|
||||
/* Dual mode timer PWM callbacks platdata */
|
||||
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
|
||||
struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = {
|
||||
.request_by_node = omap_dm_timer_request_by_node,
|
||||
.free = omap_dm_timer_free,
|
||||
.enable = omap_dm_timer_enable,
|
||||
.disable = omap_dm_timer_disable,
|
||||
.get_fclk = omap_dm_timer_get_fclk,
|
||||
.start = omap_dm_timer_start,
|
||||
.stop = omap_dm_timer_stop,
|
||||
.set_load = omap_dm_timer_set_load,
|
||||
.set_match = omap_dm_timer_set_match,
|
||||
.set_pwm = omap_dm_timer_set_pwm,
|
||||
.set_prescaler = omap_dm_timer_set_prescaler,
|
||||
.write_counter = omap_dm_timer_write_counter,
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Few boards still need auxdata populated before we populate
|
||||
* the dev entries in of_platform_populate().
|
||||
|
@ -502,6 +522,9 @@ static struct of_dev_auxdata omap_auxdata_lookup[] __initdata = {
|
|||
OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3",
|
||||
&wkup_m3_data),
|
||||
#endif
|
||||
#if IS_ENABLED(CONFIG_OMAP_DM_TIMER)
|
||||
OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata),
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
|
||||
OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
|
||||
&omap4_iommu_pdata),
|
||||
|
|
|
@ -86,13 +86,18 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
|
|||
stmfd sp!, {lr} @ save registers on stack
|
||||
/* Setup so that we will disable and enable l2 */
|
||||
mov r1, #0x1
|
||||
adrl r2, l2dis_3630 @ may be too distant for plain adr
|
||||
str r1, [r2]
|
||||
adrl r3, l2dis_3630_offset @ may be too distant for plain adr
|
||||
ldr r2, [r3] @ value for offset
|
||||
str r1, [r2, r3] @ write to l2dis_3630
|
||||
ldmfd sp!, {pc} @ restore regs and return
|
||||
ENDPROC(enable_omap3630_toggle_l2_on_restore)
|
||||
|
||||
.text
|
||||
/* Function to call rom code to save secure ram context */
|
||||
/*
|
||||
* Function to call rom code to save secure ram context. This gets
|
||||
* relocated to SRAM, so it can be all in .data section. Otherwise
|
||||
* we need to initialize api_params separately.
|
||||
*/
|
||||
.data
|
||||
.align 3
|
||||
ENTRY(save_secure_ram_context)
|
||||
stmfd sp!, {r4 - r11, lr} @ save registers on stack
|
||||
|
@ -126,6 +131,8 @@ ENDPROC(save_secure_ram_context)
|
|||
ENTRY(save_secure_ram_context_sz)
|
||||
.word . - save_secure_ram_context
|
||||
|
||||
.text
|
||||
|
||||
/*
|
||||
* ======================
|
||||
* == Idle entry point ==
|
||||
|
@ -289,12 +296,6 @@ wait_sdrc_ready:
|
|||
bic r5, r5, #0x40
|
||||
str r5, [r4]
|
||||
|
||||
/*
|
||||
* PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a
|
||||
* base instead.
|
||||
* Be careful not to clobber r7 when maintaing this code.
|
||||
*/
|
||||
|
||||
is_dll_in_lock_mode:
|
||||
/* Is dll in lock mode? */
|
||||
ldr r4, sdrc_dlla_ctrl
|
||||
|
@ -302,11 +303,7 @@ is_dll_in_lock_mode:
|
|||
tst r5, #0x4
|
||||
bne exit_nonoff_modes @ Return if locked
|
||||
/* wait till dll locks */
|
||||
adr r7, kick_counter
|
||||
wait_dll_lock_timed:
|
||||
ldr r4, wait_dll_lock_counter
|
||||
add r4, r4, #1
|
||||
str r4, [r7, #wait_dll_lock_counter - kick_counter]
|
||||
ldr r4, sdrc_dlla_status
|
||||
/* Wait 20uS for lock */
|
||||
mov r6, #8
|
||||
|
@ -330,9 +327,6 @@ kick_dll:
|
|||
orr r6, r6, #(1<<3) @ enable dll
|
||||
str r6, [r4]
|
||||
dsb
|
||||
ldr r4, kick_counter
|
||||
add r4, r4, #1
|
||||
str r4, [r7] @ kick_counter
|
||||
b wait_dll_lock_timed
|
||||
|
||||
exit_nonoff_modes:
|
||||
|
@ -360,15 +354,6 @@ sdrc_dlla_status:
|
|||
.word SDRC_DLLA_STATUS_V
|
||||
sdrc_dlla_ctrl:
|
||||
.word SDRC_DLLA_CTRL_V
|
||||
/*
|
||||
* When exporting to userspace while the counters are in SRAM,
|
||||
* these 2 words need to be at the end to facilitate retrival!
|
||||
*/
|
||||
kick_counter:
|
||||
.word 0
|
||||
wait_dll_lock_counter:
|
||||
.word 0
|
||||
|
||||
ENTRY(omap3_do_wfi_sz)
|
||||
.word . - omap3_do_wfi
|
||||
|
||||
|
@ -437,7 +422,9 @@ ENTRY(omap3_restore)
|
|||
cmp r2, #0x0 @ Check if target power state was OFF or RET
|
||||
bne logic_l1_restore
|
||||
|
||||
ldr r0, l2dis_3630
|
||||
adr r1, l2dis_3630_offset @ address for offset
|
||||
ldr r0, [r1] @ value for offset
|
||||
ldr r0, [r1, r0] @ value at l2dis_3630
|
||||
cmp r0, #0x1 @ should we disable L2 on 3630?
|
||||
bne skipl2dis
|
||||
mrc p15, 0, r0, c1, c0, 1
|
||||
|
@ -449,12 +436,14 @@ skipl2dis:
|
|||
and r1, #0x700
|
||||
cmp r1, #0x300
|
||||
beq l2_inv_gp
|
||||
adr r0, l2_inv_api_params_offset
|
||||
ldr r3, [r0]
|
||||
add r3, r3, r0 @ r3 points to dummy parameters
|
||||
mov r0, #40 @ set service ID for PPA
|
||||
mov r12, r0 @ copy secure Service ID in r12
|
||||
mov r1, #0 @ set task id for ROM code in r1
|
||||
mov r2, #4 @ set some flags in r2, r6
|
||||
mov r6, #0xff
|
||||
adr r3, l2_inv_api_params @ r3 points to dummy parameters
|
||||
dsb @ data write barrier
|
||||
dmb @ data memory barrier
|
||||
smc #1 @ call SMI monitor (smi #1)
|
||||
|
@ -488,8 +477,8 @@ skipl2dis:
|
|||
b logic_l1_restore
|
||||
|
||||
.align
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
l2_inv_api_params_offset:
|
||||
.long l2_inv_api_params - .
|
||||
l2_inv_gp:
|
||||
/* Execute smi to invalidate L2 cache */
|
||||
mov r12, #0x1 @ set up to invalidate L2
|
||||
|
@ -506,7 +495,9 @@ l2_inv_gp:
|
|||
mov r12, #0x2
|
||||
smc #0 @ Call SMI monitor (smieq)
|
||||
logic_l1_restore:
|
||||
ldr r1, l2dis_3630
|
||||
adr r0, l2dis_3630_offset @ adress for offset
|
||||
ldr r1, [r0] @ value for offset
|
||||
ldr r1, [r0, r1] @ value at l2dis_3630
|
||||
cmp r1, #0x1 @ Test if L2 re-enable needed on 3630
|
||||
bne skipl2reen
|
||||
mrc p15, 0, r1, c1, c0, 1
|
||||
|
@ -535,9 +526,17 @@ control_stat:
|
|||
.word CONTROL_STAT
|
||||
control_mem_rta:
|
||||
.word CONTROL_MEM_RTA_CTRL
|
||||
l2dis_3630_offset:
|
||||
.long l2dis_3630 - .
|
||||
|
||||
.data
|
||||
l2dis_3630:
|
||||
.word 0
|
||||
|
||||
.data
|
||||
l2_inv_api_params:
|
||||
.word 0x1, 0x00
|
||||
|
||||
/*
|
||||
* Internal functions
|
||||
*/
|
||||
|
|
|
@ -29,12 +29,6 @@
|
|||
dsb
|
||||
.endm
|
||||
|
||||
ppa_zero_params:
|
||||
.word 0x0
|
||||
|
||||
ppa_por_params:
|
||||
.word 1, 0
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
|
||||
/*
|
||||
|
@ -266,7 +260,9 @@ ENTRY(omap4_cpu_resume)
|
|||
beq skip_ns_smp_enable
|
||||
ppa_actrl_retry:
|
||||
mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX
|
||||
adr r3, ppa_zero_params @ Pointer to parameters
|
||||
adr r1, ppa_zero_params_offset
|
||||
ldr r3, [r1]
|
||||
add r3, r3, r1 @ Pointer to ppa_zero_params
|
||||
mov r1, #0x0 @ Process ID
|
||||
mov r2, #0x4 @ Flag
|
||||
mov r6, #0xff
|
||||
|
@ -303,7 +299,9 @@ skip_ns_smp_enable:
|
|||
ldr r0, =OMAP4_PPA_L2_POR_INDEX
|
||||
ldr r1, =OMAP44XX_SAR_RAM_BASE
|
||||
ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET]
|
||||
adr r3, ppa_por_params
|
||||
adr r1, ppa_por_params_offset
|
||||
ldr r3, [r1]
|
||||
add r3, r3, r1 @ Pointer to ppa_por_params
|
||||
str r4, [r3, #0x04]
|
||||
mov r1, #0x0 @ Process ID
|
||||
mov r2, #0x4 @ Flag
|
||||
|
@ -328,6 +326,8 @@ skip_l2en:
|
|||
#endif
|
||||
|
||||
b cpu_resume @ Jump to generic resume
|
||||
ppa_por_params_offset:
|
||||
.long ppa_por_params - .
|
||||
ENDPROC(omap4_cpu_resume)
|
||||
#endif /* CONFIG_ARCH_OMAP4 */
|
||||
|
||||
|
@ -380,4 +380,13 @@ ENTRY(omap_do_wfi)
|
|||
nop
|
||||
|
||||
ldmfd sp!, {pc}
|
||||
ppa_zero_params_offset:
|
||||
.long ppa_zero_params - .
|
||||
ENDPROC(omap_do_wfi)
|
||||
|
||||
.data
|
||||
ppa_zero_params:
|
||||
.word 0
|
||||
|
||||
ppa_por_params:
|
||||
.word 1, 0
|
||||
|
|
Loading…
Reference in a new issue