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mmc: sdhci-pxav2: add register workaround for PXA168 silicon bug

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The PXA168 has a documented silicon bug that results in a data abort
exception when accessing the SDHCI_HOST_VERSION register on SDH2 and
SDH4 through a 16-bit read. Implement the workaround described in the
errata, which performs a 32-bit read from a lower address instead. This
is safe to use on all four SDH peripherals.

Signed-off-by: Doug Brown <doug@schmorgal.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20230116194401.20372-4-doug@schmorgal.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Doug Brown 2023-01-16 11:43:56 -08:00 committed by Ulf Hansson
parent e764395080
commit 7f7a201ad1
1 changed files with 10 additions and 0 deletions
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10
drivers/mmc/host/sdhci-pxav2.c
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@ -80,6 +80,15 @@ static void pxav2_reset(struct sdhci_host *host, u8 mask)
}
}
static u16 pxav1_readw(struct sdhci_host *host, int reg)
{
/* Workaround for data abort exception on SDH2 and SDH4 on PXA168 */
if (reg == SDHCI_HOST_VERSION)
return readl(host->ioaddr + SDHCI_HOST_VERSION - 2) >> 16;
return readw(host->ioaddr + reg);
}
static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width)
{
u8 ctrl;
@ -107,6 +116,7 @@ struct sdhci_pxa_variant {
};
static const struct sdhci_ops pxav1_sdhci_ops = {
.read_w = pxav1_readw,
.set_clock = sdhci_set_clock,
.get_max_clock = sdhci_pltfm_clk_get_max_clock,
.set_bus_width = pxav2_mmc_set_bus_width,