mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-06 02:50:43 +00:00
drm/amd/display: add valid regoffset and NULL pointer check
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
c1aaea99a4
commit
7f93c1de64
5 changed files with 38 additions and 17 deletions
|
@ -33,6 +33,7 @@
|
|||
#include "dc_link_dp.h"
|
||||
#include "dc_link_ddc.h"
|
||||
#include "link_hwss.h"
|
||||
#include "opp.h"
|
||||
|
||||
#include "link_encoder.h"
|
||||
#include "hw_sequencer.h"
|
||||
|
@ -2382,9 +2383,10 @@ void core_link_enable_stream(
|
|||
core_dc->hwss.enable_audio_stream(pipe_ctx);
|
||||
|
||||
/* turn off otg test pattern if enable */
|
||||
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
||||
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
|
||||
COLOR_DEPTH_UNDEFINED);
|
||||
if (pipe_ctx->stream_res.tg->funcs->set_test_pattern)
|
||||
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
||||
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
|
||||
COLOR_DEPTH_UNDEFINED);
|
||||
|
||||
core_dc->hwss.enable_stream(pipe_ctx);
|
||||
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
#include "dc.h"
|
||||
#include "dc_link_dp.h"
|
||||
#include "dm_helpers.h"
|
||||
#include "opp.h"
|
||||
|
||||
#include "inc/core_types.h"
|
||||
#include "link_hwss.h"
|
||||
|
@ -2511,8 +2512,8 @@ static void set_crtc_test_pattern(struct dc_link *link,
|
|||
pipe_ctx->stream->bit_depth_params = params;
|
||||
pipe_ctx->stream_res.opp->funcs->
|
||||
opp_program_bit_depth_reduction(pipe_ctx->stream_res.opp, ¶ms);
|
||||
|
||||
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
||||
if (pipe_ctx->stream_res.tg->funcs->set_test_pattern)
|
||||
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
||||
controller_test_pattern, color_depth);
|
||||
}
|
||||
break;
|
||||
|
@ -2524,8 +2525,8 @@ static void set_crtc_test_pattern(struct dc_link *link,
|
|||
pipe_ctx->stream->bit_depth_params = params;
|
||||
pipe_ctx->stream_res.opp->funcs->
|
||||
opp_program_bit_depth_reduction(pipe_ctx->stream_res.opp, ¶ms);
|
||||
|
||||
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
||||
if (pipe_ctx->stream_res.tg->funcs->set_test_pattern)
|
||||
pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg,
|
||||
CONTROLLER_DP_TEST_PATTERN_VIDEOMODE,
|
||||
color_depth);
|
||||
}
|
||||
|
|
|
@ -1475,7 +1475,7 @@ static void power_down_controllers(struct dc *dc)
|
|||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < dc->res_pool->pipe_count; i++) {
|
||||
for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
|
||||
dc->res_pool->timing_generators[i]->funcs->disable_crtc(
|
||||
dc->res_pool->timing_generators[i]);
|
||||
}
|
||||
|
@ -1515,12 +1515,13 @@ static void disable_vga_and_power_gate_all_controllers(
|
|||
struct timing_generator *tg;
|
||||
struct dc_context *ctx = dc->ctx;
|
||||
|
||||
for (i = 0; i < dc->res_pool->pipe_count; i++) {
|
||||
for (i = 0; i < dc->res_pool->timing_generator_count; i++) {
|
||||
tg = dc->res_pool->timing_generators[i];
|
||||
|
||||
if (tg->funcs->disable_vga)
|
||||
tg->funcs->disable_vga(tg);
|
||||
|
||||
}
|
||||
for (i = 0; i < dc->res_pool->pipe_count; i++) {
|
||||
/* Enable CLOCK gating for each pipe BEFORE controller
|
||||
* powergating. */
|
||||
enable_display_pipe_clock_gating(ctx,
|
||||
|
|
|
@ -483,6 +483,11 @@ void hubbub1_update_dchub(
|
|||
struct hubbub *hubbub,
|
||||
struct dchub_init_data *dh_data)
|
||||
{
|
||||
if (REG(DCHUBBUB_SDPIF_FB_TOP) == 0) {
|
||||
ASSERT(false);
|
||||
/*should not come here*/
|
||||
return;
|
||||
}
|
||||
/* TODO: port code from dal2 */
|
||||
switch (dh_data->fb_mode) {
|
||||
case FRAME_BUFFER_MODE_ZFB_ONLY:
|
||||
|
|
|
@ -415,6 +415,8 @@ static void dpp_pg_control(
|
|||
|
||||
if (hws->ctx->dc->debug.disable_dpp_power_gate)
|
||||
return;
|
||||
if (REG(DOMAIN1_PG_CONFIG) == 0)
|
||||
return;
|
||||
|
||||
switch (dpp_inst) {
|
||||
case 0: /* DPP0 */
|
||||
|
@ -465,6 +467,8 @@ static void hubp_pg_control(
|
|||
|
||||
if (hws->ctx->dc->debug.disable_hubp_power_gate)
|
||||
return;
|
||||
if (REG(DOMAIN0_PG_CONFIG) == 0)
|
||||
return;
|
||||
|
||||
switch (hubp_inst) {
|
||||
case 0: /* DCHUBP0 */
|
||||
|
@ -865,7 +869,8 @@ void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx)
|
|||
return;
|
||||
|
||||
mpc->funcs->remove_mpcc(mpc, mpc_tree_params, mpcc_to_remove);
|
||||
opp->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true;
|
||||
if (opp != NULL)
|
||||
opp->mpcc_disconnect_pending[pipe_ctx->plane_res.mpcc_inst] = true;
|
||||
|
||||
dc->optimized_required = true;
|
||||
|
||||
|
@ -1343,10 +1348,11 @@ static void dcn10_enable_per_frame_crtc_position_reset(
|
|||
|
||||
DC_SYNC_INFO("Setting up\n");
|
||||
for (i = 0; i < group_size; i++)
|
||||
grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(
|
||||
grouped_pipes[i]->stream_res.tg,
|
||||
grouped_pipes[i]->stream->triggered_crtc_reset.event_source->status.primary_otg_inst,
|
||||
&grouped_pipes[i]->stream->triggered_crtc_reset);
|
||||
if (grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset)
|
||||
grouped_pipes[i]->stream_res.tg->funcs->enable_crtc_reset(
|
||||
grouped_pipes[i]->stream_res.tg,
|
||||
grouped_pipes[i]->stream->triggered_crtc_reset.event_source->status.primary_otg_inst,
|
||||
&grouped_pipes[i]->stream->triggered_crtc_reset);
|
||||
|
||||
DC_SYNC_INFO("Waiting for trigger\n");
|
||||
|
||||
|
@ -2496,8 +2502,14 @@ static void dcn10_update_pending_status(struct pipe_ctx *pipe_ctx)
|
|||
|
||||
static void dcn10_update_dchub(struct dce_hwseq *hws, struct dchub_init_data *dh_data)
|
||||
{
|
||||
if (hws->ctx->dc->res_pool->hubbub != NULL)
|
||||
hubbub1_update_dchub(hws->ctx->dc->res_pool->hubbub, dh_data);
|
||||
if (hws->ctx->dc->res_pool->hubbub != NULL) {
|
||||
struct hubp *hubp = hws->ctx->dc->res_pool->hubps[0];
|
||||
|
||||
if (hubp->funcs->hubp_update_dchub)
|
||||
hubp->funcs->hubp_update_dchub(hubp, dh_data);
|
||||
else
|
||||
hubbub1_update_dchub(hws->ctx->dc->res_pool->hubbub, dh_data);
|
||||
}
|
||||
}
|
||||
|
||||
static void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx)
|
||||
|
|
Loading…
Reference in a new issue