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[POWERPC] PPC440EP Interrupt Triggering and Level Settings
Corrected IRQ triggering and level settings according to latest revision of the 440EP User Manual (rev 1.24 nov 16, 2007). The incorrect settings might cause a failure of the network if both onchip ethernet ports are under heavy load. Signed-off-by: Wolfgang Ocker <weo@reccoware.de> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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1 changed files with 3 additions and 3 deletions
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@ -172,11 +172,11 @@ struct ocp_def core_ocp[] = {
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/* Polarity and triggering settings for internal interrupt sources */
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struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
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{ .polarity = 0xffbffe03,
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.triggering = 0xfffffe00,
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.triggering = 0x00000000,
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.ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
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},
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{ .polarity = 0xffffc6ef,
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.triggering = 0xffffc7ff,
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{ .polarity = 0xffffc6af,
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.triggering = 0x06000140,
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.ext_irq_mask = 0x00003800, /* IRQ7 - IRQ9 */
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},
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};
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