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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-05 18:39:59 +00:00
[PATCH] EHCI, split out PCI glue
This splits BIOS and PCI specific support out of ehci-hcd.c into ehci-pci.c. It follows the model already used in the OHCI driver so support for non-PCI EHCI controllers can be more easily added. Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/usb/host/ehci-hcd.c | 543 ++++++-------------------------------------- drivers/usb/host/ehci-pci.c | 414 +++++++++++++++++++++++++++++++++ drivers/usb/host/ehci.h | 1 3 files changed, 492 insertions(+), 466 deletions(-)
This commit is contained in:
parent
e9b7bd4ee7
commit
7ff71d6adf
3 changed files with 500 additions and 474 deletions
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@ -300,44 +300,6 @@ static void ehci_watchdog (unsigned long param)
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spin_unlock_irqrestore (&ehci->lock, flags);
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}
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#ifdef CONFIG_PCI
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/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
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* off the controller (maybe it can boot from highspeed USB disks).
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*/
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static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
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{
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struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
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/* always say Linux will own the hardware */
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pci_write_config_byte(pdev, where + 3, 1);
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/* maybe wait a while for BIOS to respond */
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if (cap & (1 << 16)) {
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int msec = 5000;
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do {
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msleep(10);
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msec -= 10;
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pci_read_config_dword(pdev, where, &cap);
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} while ((cap & (1 << 16)) && msec);
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if (cap & (1 << 16)) {
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ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
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where, cap);
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// some BIOS versions seem buggy...
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// return 1;
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ehci_warn (ehci, "continuing after BIOS bug...\n");
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/* disable all SMIs, and clear "BIOS owns" flag */
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pci_write_config_dword(pdev, where + 4, 0);
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pci_write_config_byte(pdev, where + 2, 0);
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} else
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ehci_dbg(ehci, "BIOS handoff succeeded\n");
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}
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return 0;
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}
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#endif
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/* Reboot notifiers kick in for silicon on any bus (not just pci, etc).
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* This forcibly disables dma and IRQs, helping kexec and other cases
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* where the next system software may expect clean state.
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@ -371,156 +333,90 @@ static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
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msleep(20);
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}
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/*-------------------------------------------------------------------------*/
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/* called by khubd or root hub init threads */
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static int ehci_hc_reset (struct usb_hcd *hcd)
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/*
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* ehci_work is called from some interrupts, timers, and so on.
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* it calls driver completion functions, after dropping ehci->lock.
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*/
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static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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u32 temp;
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unsigned count = 256/4;
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timer_action_done (ehci, TIMER_IO_WATCHDOG);
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if (ehci->reclaim_ready)
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end_unlink_async (ehci, regs);
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spin_lock_init (&ehci->lock);
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/* another CPU may drop ehci->lock during a schedule scan while
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* it reports urb completions. this flag guards against bogus
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* attempts at re-entrant schedule scanning.
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*/
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if (ehci->scanning)
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return;
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ehci->scanning = 1;
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scan_async (ehci, regs);
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if (ehci->next_uframe != -1)
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scan_periodic (ehci, regs);
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ehci->scanning = 0;
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ehci->caps = hcd->regs;
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ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase));
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dbg_hcs_params (ehci, "reset");
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dbg_hcc_params (ehci, "reset");
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = readl (&ehci->caps->hcs_params);
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#ifdef CONFIG_PCI
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if (hcd->self.controller->bus == &pci_bus_type) {
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struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
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switch (pdev->vendor) {
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case PCI_VENDOR_ID_TDI:
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if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
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ehci->is_tdi_rh_tt = 1;
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tdi_reset (ehci);
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}
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break;
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case PCI_VENDOR_ID_AMD:
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/* AMD8111 EHCI doesn't work, according to AMD errata */
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if (pdev->device == 0x7463) {
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ehci_info (ehci, "ignoring AMD8111 (errata)\n");
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return -EIO;
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}
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break;
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case PCI_VENDOR_ID_NVIDIA:
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/* NVidia reports that certain chips don't handle
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* QH, ITD, or SITD addresses above 2GB. (But TD,
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* data buffer, and periodic schedule are normal.)
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*/
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switch (pdev->device) {
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case 0x003c: /* MCP04 */
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case 0x005b: /* CK804 */
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case 0x00d8: /* CK8 */
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case 0x00e8: /* CK8S */
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if (pci_set_consistent_dma_mask(pdev,
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DMA_31BIT_MASK) < 0)
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ehci_warn (ehci, "can't enable NVidia "
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"workaround for >2GB RAM\n");
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break;
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}
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break;
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}
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/* optional debug port, normally in the first BAR */
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temp = pci_find_capability (pdev, 0x0a);
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if (temp) {
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pci_read_config_dword(pdev, temp, &temp);
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temp >>= 16;
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if ((temp & (3 << 13)) == (1 << 13)) {
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temp &= 0x1fff;
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ehci->debug = hcd->regs + temp;
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temp = readl (&ehci->debug->control);
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ehci_info (ehci, "debug port %d%s\n",
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HCS_DEBUG_PORT(ehci->hcs_params),
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(temp & DBGP_ENABLED)
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? " IN USE"
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: "");
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if (!(temp & DBGP_ENABLED))
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ehci->debug = NULL;
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}
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}
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temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
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} else
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temp = 0;
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/* EHCI 0.96 and later may have "extended capabilities" */
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while (temp && count--) {
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u32 cap;
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pci_read_config_dword (to_pci_dev(hcd->self.controller),
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temp, &cap);
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ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
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switch (cap & 0xff) {
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case 1: /* BIOS/SMM/... handoff */
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if (bios_handoff (ehci, temp, cap) != 0)
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return -EOPNOTSUPP;
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break;
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case 0: /* illegal reserved capability */
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ehci_warn (ehci, "illegal capability!\n");
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cap = 0;
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/* FALLTHROUGH */
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default: /* unknown */
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break;
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}
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temp = (cap >> 8) & 0xff;
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}
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if (!count) {
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ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
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return -EIO;
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}
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if (ehci_is_TDI(ehci))
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ehci_reset (ehci);
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#endif
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ehci_port_power (ehci, 0);
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/* at least the Genesys GL880S needs fixup here */
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temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
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temp &= 0x0f;
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if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
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ehci_dbg (ehci, "bogus port configuration: "
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"cc=%d x pcc=%d < ports=%d\n",
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HCS_N_CC(ehci->hcs_params),
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HCS_N_PCC(ehci->hcs_params),
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HCS_N_PORTS(ehci->hcs_params));
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#ifdef CONFIG_PCI
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if (hcd->self.controller->bus == &pci_bus_type) {
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struct pci_dev *pdev;
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pdev = to_pci_dev(hcd->self.controller);
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switch (pdev->vendor) {
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case 0x17a0: /* GENESYS */
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/* GL880S: should be PORTS=2 */
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temp |= (ehci->hcs_params & ~0xf);
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ehci->hcs_params = temp;
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break;
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case PCI_VENDOR_ID_NVIDIA:
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/* NF4: should be PCC=10 */
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break;
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}
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}
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#endif
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}
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/* force HC to halt state */
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return ehci_halt (ehci);
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/* the IO watchdog guards against hardware or driver bugs that
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* misplace IRQs, and should let us run completely without IRQs.
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* such lossage has been observed on both VT6202 and VT8235.
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*/
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if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
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(ehci->async->qh_next.ptr != NULL ||
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ehci->periodic_sched != 0))
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timer_action (ehci, TIMER_IO_WATCHDOG);
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}
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static int ehci_start (struct usb_hcd *hcd)
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static void ehci_stop (struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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ehci_dbg (ehci, "stop\n");
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/* Turn off port power on all root hub ports. */
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ehci_port_power (ehci, 0);
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/* no more interrupts ... */
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del_timer_sync (&ehci->watchdog);
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spin_lock_irq(&ehci->lock);
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if (HC_IS_RUNNING (hcd->state))
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ehci_quiesce (ehci);
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ehci_reset (ehci);
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writel (0, &ehci->regs->intr_enable);
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spin_unlock_irq(&ehci->lock);
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/* let companion controllers work when we aren't */
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writel (0, &ehci->regs->configured_flag);
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unregister_reboot_notifier (&ehci->reboot_notifier);
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remove_debug_files (ehci);
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/* root hub is shut down separately (first, when possible) */
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spin_lock_irq (&ehci->lock);
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if (ehci->async)
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ehci_work (ehci, NULL);
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spin_unlock_irq (&ehci->lock);
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ehci_mem_cleanup (ehci);
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#ifdef EHCI_STATS
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ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
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ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
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ehci->stats.lost_iaa);
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ehci_dbg (ehci, "complete %ld unlink %ld\n",
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ehci->stats.complete, ehci->stats.unlink);
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#endif
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dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
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}
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static int ehci_run (struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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u32 temp;
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int retval;
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u32 hcc_params;
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u8 sbrn = 0;
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int first;
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/* skip some things on restart paths */
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@ -559,27 +455,6 @@ static int ehci_start (struct usb_hcd *hcd)
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}
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writel (ehci->periodic_dma, &ehci->regs->frame_list);
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#ifdef CONFIG_PCI
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if (hcd->self.controller->bus == &pci_bus_type) {
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struct pci_dev *pdev;
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u16 port_wake;
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pdev = to_pci_dev(hcd->self.controller);
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/* Serial Bus Release Number is at PCI 0x60 offset */
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pci_read_config_byte(pdev, 0x60, &sbrn);
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/* port wake capability, reported by boot firmware */
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pci_read_config_word(pdev, 0x62, &port_wake);
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hcd->can_wakeup = (port_wake & 1) != 0;
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/* help hc dma work well with cachelines */
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retval = pci_set_mwi(pdev);
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if (retval)
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ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
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}
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#endif
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/*
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* dedicate a qh for the async ring head, since we couldn't unlink
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* a 'real' qh without stopping the async schedule [4.8]. use it
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@ -675,7 +550,7 @@ static int ehci_start (struct usb_hcd *hcd)
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temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
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ehci_info (ehci,
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"USB %x.%x %s, EHCI %x.%02x, driver %s\n",
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((sbrn & 0xf0)>>4), (sbrn & 0x0f),
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((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
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first ? "initialized" : "restarted",
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temp >> 8, temp & 0xff, DRIVER_VERSION);
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@ -687,188 +562,6 @@ static int ehci_start (struct usb_hcd *hcd)
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return 0;
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}
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/* always called by thread; normally rmmod */
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static void ehci_stop (struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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ehci_dbg (ehci, "stop\n");
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/* Turn off port power on all root hub ports. */
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ehci_port_power (ehci, 0);
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/* no more interrupts ... */
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del_timer_sync (&ehci->watchdog);
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spin_lock_irq(&ehci->lock);
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if (HC_IS_RUNNING (hcd->state))
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ehci_quiesce (ehci);
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ehci_reset (ehci);
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writel (0, &ehci->regs->intr_enable);
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spin_unlock_irq(&ehci->lock);
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/* let companion controllers work when we aren't */
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writel (0, &ehci->regs->configured_flag);
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unregister_reboot_notifier (&ehci->reboot_notifier);
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remove_debug_files (ehci);
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/* root hub is shut down separately (first, when possible) */
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spin_lock_irq (&ehci->lock);
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if (ehci->async)
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ehci_work (ehci, NULL);
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spin_unlock_irq (&ehci->lock);
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ehci_mem_cleanup (ehci);
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#ifdef EHCI_STATS
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ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
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ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
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ehci->stats.lost_iaa);
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ehci_dbg (ehci, "complete %ld unlink %ld\n",
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ehci->stats.complete, ehci->stats.unlink);
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#endif
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dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
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}
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static int ehci_get_frame (struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
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}
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/*-------------------------------------------------------------------------*/
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#ifdef CONFIG_PM
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/* suspend/resume, section 4.3 */
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/* These routines rely on the bus (pci, platform, etc)
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* to handle powerdown and wakeup, and currently also on
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* transceivers that don't need any software attention to set up
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* the right sort of wakeup.
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*/
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static int ehci_suspend (struct usb_hcd *hcd, pm_message_t message)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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if (time_before (jiffies, ehci->next_statechange))
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msleep (100);
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#ifdef CONFIG_USB_SUSPEND
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(void) usb_suspend_device (hcd->self.root_hub);
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#else
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usb_lock_device (hcd->self.root_hub);
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(void) ehci_hub_suspend (hcd);
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usb_unlock_device (hcd->self.root_hub);
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#endif
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// save (PCI) FLADJ in case of Vaux power loss
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// ... we'd only use it to handle clock skew
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return 0;
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}
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static int ehci_resume (struct usb_hcd *hcd)
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{
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struct ehci_hcd *ehci = hcd_to_ehci (hcd);
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unsigned port;
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struct usb_device *root = hcd->self.root_hub;
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int retval = -EINVAL;
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// maybe restore (PCI) FLADJ
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if (time_before (jiffies, ehci->next_statechange))
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msleep (100);
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/* If any port is suspended (or owned by the companion),
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* we know we can/must resume the HC (and mustn't reset it).
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*/
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for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
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u32 status;
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port--;
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status = readl (&ehci->regs->port_status [port]);
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if (!(status & PORT_POWER))
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continue;
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if (status & (PORT_SUSPEND | PORT_OWNER)) {
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down (&hcd->self.root_hub->serialize);
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retval = ehci_hub_resume (hcd);
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up (&hcd->self.root_hub->serialize);
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break;
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}
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if (!root->children [port])
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continue;
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dbg_port (ehci, __FUNCTION__, port + 1, status);
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usb_set_device_state (root->children[port],
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USB_STATE_NOTATTACHED);
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}
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/* Else reset, to cope with power loss or flush-to-storage
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* style "resume" having activated BIOS during reboot.
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*/
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if (port == 0) {
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(void) ehci_halt (ehci);
|
||||
(void) ehci_reset (ehci);
|
||||
(void) ehci_hc_reset (hcd);
|
||||
|
||||
/* emptying the schedule aborts any urbs */
|
||||
spin_lock_irq (&ehci->lock);
|
||||
if (ehci->reclaim)
|
||||
ehci->reclaim_ready = 1;
|
||||
ehci_work (ehci, NULL);
|
||||
spin_unlock_irq (&ehci->lock);
|
||||
|
||||
/* restart; khubd will disconnect devices */
|
||||
retval = ehci_start (hcd);
|
||||
|
||||
/* here we "know" root ports should always stay powered;
|
||||
* but some controllers may lose all power.
|
||||
*/
|
||||
ehci_port_power (ehci, 1);
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
* ehci_work is called from some interrupts, timers, and so on.
|
||||
* it calls driver completion functions, after dropping ehci->lock.
|
||||
*/
|
||||
static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
|
||||
{
|
||||
timer_action_done (ehci, TIMER_IO_WATCHDOG);
|
||||
if (ehci->reclaim_ready)
|
||||
end_unlink_async (ehci, regs);
|
||||
|
||||
/* another CPU may drop ehci->lock during a schedule scan while
|
||||
* it reports urb completions. this flag guards against bogus
|
||||
* attempts at re-entrant schedule scanning.
|
||||
*/
|
||||
if (ehci->scanning)
|
||||
return;
|
||||
ehci->scanning = 1;
|
||||
scan_async (ehci, regs);
|
||||
if (ehci->next_uframe != -1)
|
||||
scan_periodic (ehci, regs);
|
||||
ehci->scanning = 0;
|
||||
|
||||
/* the IO watchdog guards against hardware or driver bugs that
|
||||
* misplace IRQs, and should let us run completely without IRQs.
|
||||
* such lossage has been observed on both VT6202 and VT8235.
|
||||
*/
|
||||
if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
|
||||
(ehci->async->qh_next.ptr != NULL ||
|
||||
ehci->periodic_sched != 0))
|
||||
timer_action (ehci, TIMER_IO_WATCHDOG);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
|
||||
|
@ -1179,106 +872,24 @@ ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
|
|||
return;
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
static const struct hc_driver ehci_driver = {
|
||||
.description = hcd_name,
|
||||
.product_desc = "EHCI Host Controller",
|
||||
.hcd_priv_size = sizeof(struct ehci_hcd),
|
||||
|
||||
/*
|
||||
* generic hardware linkage
|
||||
*/
|
||||
.irq = ehci_irq,
|
||||
.flags = HCD_MEMORY | HCD_USB2,
|
||||
|
||||
/*
|
||||
* basic lifecycle operations
|
||||
*/
|
||||
.reset = ehci_hc_reset,
|
||||
.start = ehci_start,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = ehci_suspend,
|
||||
.resume = ehci_resume,
|
||||
#endif
|
||||
.stop = ehci_stop,
|
||||
|
||||
/*
|
||||
* managing i/o requests and associated device resources
|
||||
*/
|
||||
.urb_enqueue = ehci_urb_enqueue,
|
||||
.urb_dequeue = ehci_urb_dequeue,
|
||||
.endpoint_disable = ehci_endpoint_disable,
|
||||
|
||||
/*
|
||||
* scheduling support
|
||||
*/
|
||||
.get_frame_number = ehci_get_frame,
|
||||
|
||||
/*
|
||||
* root hub support
|
||||
*/
|
||||
.hub_status_data = ehci_hub_status_data,
|
||||
.hub_control = ehci_hub_control,
|
||||
.hub_suspend = ehci_hub_suspend,
|
||||
.hub_resume = ehci_hub_resume,
|
||||
};
|
||||
static int ehci_get_frame (struct usb_hcd *hcd)
|
||||
{
|
||||
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
|
||||
return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* EHCI 1.0 doesn't require PCI */
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
||||
/* PCI driver selection metadata; PCI hotplugging uses this */
|
||||
static const struct pci_device_id pci_ids [] = { {
|
||||
/* handle any USB 2.0 EHCI controller */
|
||||
PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
|
||||
.driver_data = (unsigned long) &ehci_driver,
|
||||
},
|
||||
{ /* end: all zeroes */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE (pci, pci_ids);
|
||||
|
||||
/* pci driver glue; this is a "new style" PCI driver module */
|
||||
static struct pci_driver ehci_pci_driver = {
|
||||
.name = (char *) hcd_name,
|
||||
.id_table = pci_ids,
|
||||
|
||||
.probe = usb_hcd_pci_probe,
|
||||
.remove = usb_hcd_pci_remove,
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = usb_hcd_pci_suspend,
|
||||
.resume = usb_hcd_pci_resume,
|
||||
#endif
|
||||
};
|
||||
|
||||
#endif /* PCI */
|
||||
|
||||
|
||||
#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
|
||||
|
||||
MODULE_DESCRIPTION (DRIVER_INFO);
|
||||
MODULE_AUTHOR (DRIVER_AUTHOR);
|
||||
MODULE_LICENSE ("GPL");
|
||||
|
||||
static int __init init (void)
|
||||
{
|
||||
if (usb_disabled())
|
||||
return -ENODEV;
|
||||
#ifdef CONFIG_PCI
|
||||
#include "ehci-pci.c"
|
||||
#endif
|
||||
|
||||
pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
|
||||
hcd_name,
|
||||
sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
|
||||
sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
|
||||
|
||||
return pci_register_driver (&ehci_pci_driver);
|
||||
}
|
||||
module_init (init);
|
||||
|
||||
static void __exit cleanup (void)
|
||||
{
|
||||
pci_unregister_driver (&ehci_pci_driver);
|
||||
}
|
||||
module_exit (cleanup);
|
||||
#if !defined(CONFIG_PCI)
|
||||
#error "missing bus glue for ehci-hcd"
|
||||
#endif
|
||||
|
|
414
drivers/usb/host/ehci-pci.c
Normal file
414
drivers/usb/host/ehci-pci.c
Normal file
|
@ -0,0 +1,414 @@
|
|||
/*
|
||||
* EHCI HCD (Host Controller Driver) PCI Bus Glue.
|
||||
*
|
||||
* Copyright (c) 2000-2004 by David Brownell
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but
|
||||
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software Foundation,
|
||||
* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_PCI
|
||||
#error "This file is PCI bus glue. CONFIG_PCI must be defined."
|
||||
#endif
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
|
||||
* off the controller (maybe it can boot from highspeed USB disks).
|
||||
*/
|
||||
static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
|
||||
{
|
||||
struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
|
||||
|
||||
/* always say Linux will own the hardware */
|
||||
pci_write_config_byte(pdev, where + 3, 1);
|
||||
|
||||
/* maybe wait a while for BIOS to respond */
|
||||
if (cap & (1 << 16)) {
|
||||
int msec = 5000;
|
||||
|
||||
do {
|
||||
msleep(10);
|
||||
msec -= 10;
|
||||
pci_read_config_dword(pdev, where, &cap);
|
||||
} while ((cap & (1 << 16)) && msec);
|
||||
if (cap & (1 << 16)) {
|
||||
ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
|
||||
where, cap);
|
||||
// some BIOS versions seem buggy...
|
||||
// return 1;
|
||||
ehci_warn (ehci, "continuing after BIOS bug...\n");
|
||||
/* disable all SMIs, and clear "BIOS owns" flag */
|
||||
pci_write_config_dword(pdev, where + 4, 0);
|
||||
pci_write_config_byte(pdev, where + 2, 0);
|
||||
} else
|
||||
ehci_dbg(ehci, "BIOS handoff succeeded\n");
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* called by khubd or root hub init threads */
|
||||
static int ehci_pci_reset (struct usb_hcd *hcd)
|
||||
{
|
||||
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
|
||||
u32 temp;
|
||||
unsigned count = 256/4;
|
||||
|
||||
spin_lock_init (&ehci->lock);
|
||||
|
||||
ehci->caps = hcd->regs;
|
||||
ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase));
|
||||
dbg_hcs_params (ehci, "reset");
|
||||
dbg_hcc_params (ehci, "reset");
|
||||
|
||||
/* cache this readonly data; minimize chip reads */
|
||||
ehci->hcs_params = readl (&ehci->caps->hcs_params);
|
||||
|
||||
if (hcd->self.controller->bus == &pci_bus_type) {
|
||||
struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
|
||||
|
||||
switch (pdev->vendor) {
|
||||
case PCI_VENDOR_ID_TDI:
|
||||
if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
|
||||
ehci->is_tdi_rh_tt = 1;
|
||||
tdi_reset (ehci);
|
||||
}
|
||||
break;
|
||||
case PCI_VENDOR_ID_AMD:
|
||||
/* AMD8111 EHCI doesn't work, according to AMD errata */
|
||||
if (pdev->device == 0x7463) {
|
||||
ehci_info (ehci, "ignoring AMD8111 (errata)\n");
|
||||
return -EIO;
|
||||
}
|
||||
break;
|
||||
case PCI_VENDOR_ID_NVIDIA:
|
||||
/* NVidia reports that certain chips don't handle
|
||||
* QH, ITD, or SITD addresses above 2GB. (But TD,
|
||||
* data buffer, and periodic schedule are normal.)
|
||||
*/
|
||||
switch (pdev->device) {
|
||||
case 0x003c: /* MCP04 */
|
||||
case 0x005b: /* CK804 */
|
||||
case 0x00d8: /* CK8 */
|
||||
case 0x00e8: /* CK8S */
|
||||
if (pci_set_consistent_dma_mask(pdev,
|
||||
DMA_31BIT_MASK) < 0)
|
||||
ehci_warn (ehci, "can't enable NVidia "
|
||||
"workaround for >2GB RAM\n");
|
||||
break;
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
/* optional debug port, normally in the first BAR */
|
||||
temp = pci_find_capability (pdev, 0x0a);
|
||||
if (temp) {
|
||||
pci_read_config_dword(pdev, temp, &temp);
|
||||
temp >>= 16;
|
||||
if ((temp & (3 << 13)) == (1 << 13)) {
|
||||
temp &= 0x1fff;
|
||||
ehci->debug = hcd->regs + temp;
|
||||
temp = readl (&ehci->debug->control);
|
||||
ehci_info (ehci, "debug port %d%s\n",
|
||||
HCS_DEBUG_PORT(ehci->hcs_params),
|
||||
(temp & DBGP_ENABLED)
|
||||
? " IN USE"
|
||||
: "");
|
||||
if (!(temp & DBGP_ENABLED))
|
||||
ehci->debug = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
|
||||
} else
|
||||
temp = 0;
|
||||
|
||||
/* EHCI 0.96 and later may have "extended capabilities" */
|
||||
while (temp && count--) {
|
||||
u32 cap;
|
||||
|
||||
pci_read_config_dword (to_pci_dev(hcd->self.controller),
|
||||
temp, &cap);
|
||||
ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
|
||||
switch (cap & 0xff) {
|
||||
case 1: /* BIOS/SMM/... handoff */
|
||||
if (bios_handoff (ehci, temp, cap) != 0)
|
||||
return -EOPNOTSUPP;
|
||||
break;
|
||||
case 0: /* illegal reserved capability */
|
||||
ehci_warn (ehci, "illegal capability!\n");
|
||||
cap = 0;
|
||||
/* FALLTHROUGH */
|
||||
default: /* unknown */
|
||||
break;
|
||||
}
|
||||
temp = (cap >> 8) & 0xff;
|
||||
}
|
||||
if (!count) {
|
||||
ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
|
||||
return -EIO;
|
||||
}
|
||||
if (ehci_is_TDI(ehci))
|
||||
ehci_reset (ehci);
|
||||
|
||||
ehci_port_power (ehci, 0);
|
||||
|
||||
/* at least the Genesys GL880S needs fixup here */
|
||||
temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
|
||||
temp &= 0x0f;
|
||||
if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
|
||||
ehci_dbg (ehci, "bogus port configuration: "
|
||||
"cc=%d x pcc=%d < ports=%d\n",
|
||||
HCS_N_CC(ehci->hcs_params),
|
||||
HCS_N_PCC(ehci->hcs_params),
|
||||
HCS_N_PORTS(ehci->hcs_params));
|
||||
|
||||
if (hcd->self.controller->bus == &pci_bus_type) {
|
||||
struct pci_dev *pdev;
|
||||
|
||||
pdev = to_pci_dev(hcd->self.controller);
|
||||
switch (pdev->vendor) {
|
||||
case 0x17a0: /* GENESYS */
|
||||
/* GL880S: should be PORTS=2 */
|
||||
temp |= (ehci->hcs_params & ~0xf);
|
||||
ehci->hcs_params = temp;
|
||||
break;
|
||||
case PCI_VENDOR_ID_NVIDIA:
|
||||
/* NF4: should be PCC=10 */
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* force HC to halt state */
|
||||
return ehci_halt (ehci);
|
||||
}
|
||||
|
||||
static int ehci_pci_start (struct usb_hcd *hcd)
|
||||
{
|
||||
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
|
||||
int result = 0;
|
||||
|
||||
if (hcd->self.controller->bus == &pci_bus_type) {
|
||||
struct pci_dev *pdev;
|
||||
u16 port_wake;
|
||||
|
||||
pdev = to_pci_dev(hcd->self.controller);
|
||||
|
||||
/* Serial Bus Release Number is at PCI 0x60 offset */
|
||||
pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
|
||||
|
||||
/* port wake capability, reported by boot firmware */
|
||||
pci_read_config_word(pdev, 0x62, &port_wake);
|
||||
hcd->can_wakeup = (port_wake & 1) != 0;
|
||||
|
||||
/* help hc dma work well with cachelines */
|
||||
result = pci_set_mwi(pdev);
|
||||
if (result)
|
||||
ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
|
||||
}
|
||||
|
||||
return ehci_run (hcd);
|
||||
}
|
||||
|
||||
/* always called by thread; normally rmmod */
|
||||
|
||||
static void ehci_pci_stop (struct usb_hcd *hcd)
|
||||
{
|
||||
ehci_stop (hcd);
|
||||
}
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
|
||||
/* suspend/resume, section 4.3 */
|
||||
|
||||
/* These routines rely on the bus (pci, platform, etc)
|
||||
* to handle powerdown and wakeup, and currently also on
|
||||
* transceivers that don't need any software attention to set up
|
||||
* the right sort of wakeup.
|
||||
*/
|
||||
|
||||
static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
|
||||
{
|
||||
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
|
||||
|
||||
if (time_before (jiffies, ehci->next_statechange))
|
||||
msleep (100);
|
||||
|
||||
#ifdef CONFIG_USB_SUSPEND
|
||||
(void) usb_suspend_device (hcd->self.root_hub);
|
||||
#else
|
||||
usb_lock_device (hcd->self.root_hub);
|
||||
(void) ehci_hub_suspend (hcd);
|
||||
usb_unlock_device (hcd->self.root_hub);
|
||||
#endif
|
||||
|
||||
// save (PCI) FLADJ in case of Vaux power loss
|
||||
// ... we'd only use it to handle clock skew
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ehci_pci_resume (struct usb_hcd *hcd)
|
||||
{
|
||||
struct ehci_hcd *ehci = hcd_to_ehci (hcd);
|
||||
unsigned port;
|
||||
struct usb_device *root = hcd->self.root_hub;
|
||||
int retval = -EINVAL;
|
||||
|
||||
// maybe restore (PCI) FLADJ
|
||||
|
||||
if (time_before (jiffies, ehci->next_statechange))
|
||||
msleep (100);
|
||||
|
||||
/* If any port is suspended (or owned by the companion),
|
||||
* we know we can/must resume the HC (and mustn't reset it).
|
||||
*/
|
||||
for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
|
||||
u32 status;
|
||||
port--;
|
||||
status = readl (&ehci->regs->port_status [port]);
|
||||
if (!(status & PORT_POWER))
|
||||
continue;
|
||||
if (status & (PORT_SUSPEND | PORT_OWNER)) {
|
||||
down (&hcd->self.root_hub->serialize);
|
||||
retval = ehci_hub_resume (hcd);
|
||||
up (&hcd->self.root_hub->serialize);
|
||||
break;
|
||||
}
|
||||
if (!root->children [port])
|
||||
continue;
|
||||
dbg_port (ehci, __FUNCTION__, port + 1, status);
|
||||
usb_set_device_state (root->children[port],
|
||||
USB_STATE_NOTATTACHED);
|
||||
}
|
||||
|
||||
/* Else reset, to cope with power loss or flush-to-storage
|
||||
* style "resume" having activated BIOS during reboot.
|
||||
*/
|
||||
if (port == 0) {
|
||||
(void) ehci_halt (ehci);
|
||||
(void) ehci_reset (ehci);
|
||||
(void) ehci_pci_reset (hcd);
|
||||
|
||||
/* emptying the schedule aborts any urbs */
|
||||
spin_lock_irq (&ehci->lock);
|
||||
if (ehci->reclaim)
|
||||
ehci->reclaim_ready = 1;
|
||||
ehci_work (ehci, NULL);
|
||||
spin_unlock_irq (&ehci->lock);
|
||||
|
||||
/* restart; khubd will disconnect devices */
|
||||
retval = ehci_run (hcd);
|
||||
|
||||
/* here we "know" root ports should always stay powered;
|
||||
* but some controllers may lose all power.
|
||||
*/
|
||||
ehci_port_power (ehci, 1);
|
||||
}
|
||||
|
||||
return retval;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct hc_driver ehci_pci_hc_driver = {
|
||||
.description = hcd_name,
|
||||
.product_desc = "EHCI Host Controller",
|
||||
.hcd_priv_size = sizeof(struct ehci_hcd),
|
||||
|
||||
/*
|
||||
* generic hardware linkage
|
||||
*/
|
||||
.irq = ehci_irq,
|
||||
.flags = HCD_MEMORY | HCD_USB2,
|
||||
|
||||
/*
|
||||
* basic lifecycle operations
|
||||
*/
|
||||
.reset = ehci_pci_reset,
|
||||
.start = ehci_pci_start,
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = ehci_pci_suspend,
|
||||
.resume = ehci_pci_resume,
|
||||
#endif
|
||||
.stop = ehci_pci_stop,
|
||||
|
||||
/*
|
||||
* managing i/o requests and associated device resources
|
||||
*/
|
||||
.urb_enqueue = ehci_urb_enqueue,
|
||||
.urb_dequeue = ehci_urb_dequeue,
|
||||
.endpoint_disable = ehci_endpoint_disable,
|
||||
|
||||
/*
|
||||
* scheduling support
|
||||
*/
|
||||
.get_frame_number = ehci_get_frame,
|
||||
|
||||
/*
|
||||
* root hub support
|
||||
*/
|
||||
.hub_status_data = ehci_hub_status_data,
|
||||
.hub_control = ehci_hub_control,
|
||||
.hub_suspend = ehci_hub_suspend,
|
||||
.hub_resume = ehci_hub_resume,
|
||||
};
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
/* PCI driver selection metadata; PCI hotplugging uses this */
|
||||
static const struct pci_device_id pci_ids [] = { {
|
||||
/* handle any USB 2.0 EHCI controller */
|
||||
PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
|
||||
.driver_data = (unsigned long) &ehci_pci_hc_driver,
|
||||
},
|
||||
{ /* end: all zeroes */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE (pci, pci_ids);
|
||||
|
||||
/* pci driver glue; this is a "new style" PCI driver module */
|
||||
static struct pci_driver ehci_pci_driver = {
|
||||
.name = (char *) hcd_name,
|
||||
.id_table = pci_ids,
|
||||
|
||||
.probe = usb_hcd_pci_probe,
|
||||
.remove = usb_hcd_pci_remove,
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
.suspend = usb_hcd_pci_suspend,
|
||||
.resume = usb_hcd_pci_resume,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init ehci_hcd_pci_init (void)
|
||||
{
|
||||
if (usb_disabled())
|
||||
return -ENODEV;
|
||||
|
||||
pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
|
||||
hcd_name,
|
||||
sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
|
||||
sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
|
||||
|
||||
return pci_register_driver (&ehci_pci_driver);
|
||||
}
|
||||
module_init (ehci_hcd_pci_init);
|
||||
|
||||
static void __exit ehci_hcd_pci_cleanup (void)
|
||||
{
|
||||
pci_unregister_driver (&ehci_pci_driver);
|
||||
}
|
||||
module_exit (ehci_hcd_pci_cleanup);
|
|
@ -97,6 +97,7 @@ struct ehci_hcd { /* one per controller */
|
|||
#else
|
||||
# define COUNT(x) do {} while (0)
|
||||
#endif
|
||||
u8 sbrn; /* packed release number */
|
||||
};
|
||||
|
||||
/* convert between an HCD pointer and the corresponding EHCI_HCD */
|
||||
|
|
Loading…
Reference in a new issue