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KVM: x86: Add a framework for supporting MSR-based features
Provide a new KVM capability that allows bits within MSRs to be recognized as features. Two new ioctls are added to the /dev/kvm ioctl routine to retrieve the list of these MSRs and then retrieve their values. A kvm_x86_ops callback is used to determine support for the listed MSR-based features. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [Tweaked documentation. - Radim] Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
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6 changed files with 114 additions and 17 deletions
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@ -123,14 +123,15 @@ memory layout to fit in user mode), check KVM_CAP_MIPS_VZ and use the
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flag KVM_VM_MIPS_VZ.
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4.3 KVM_GET_MSR_INDEX_LIST
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4.3 KVM_GET_MSR_INDEX_LIST, KVM_GET_MSR_FEATURE_INDEX_LIST
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Capability: basic
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Capability: basic, KVM_CAP_GET_MSR_FEATURES for KVM_GET_MSR_FEATURE_INDEX_LIST
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Architectures: x86
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Type: system
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Type: system ioctl
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Parameters: struct kvm_msr_list (in/out)
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Returns: 0 on success; -1 on error
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Errors:
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EFAULT: the msr index list cannot be read from or written to
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E2BIG: the msr index list is to be to fit in the array specified by
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the user.
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@ -139,16 +140,23 @@ struct kvm_msr_list {
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__u32 indices[0];
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};
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This ioctl returns the guest msrs that are supported. The list varies
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by kvm version and host processor, but does not change otherwise. The
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user fills in the size of the indices array in nmsrs, and in return
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kvm adjusts nmsrs to reflect the actual number of msrs and fills in
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the indices array with their numbers.
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The user fills in the size of the indices array in nmsrs, and in return
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kvm adjusts nmsrs to reflect the actual number of msrs and fills in the
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indices array with their numbers.
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KVM_GET_MSR_INDEX_LIST returns the guest msrs that are supported. The list
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varies by kvm version and host processor, but does not change otherwise.
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Note: if kvm indicates supports MCE (KVM_CAP_MCE), then the MCE bank MSRs are
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not returned in the MSR list, as different vcpus can have a different number
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of banks, as set via the KVM_X86_SETUP_MCE ioctl.
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KVM_GET_MSR_FEATURE_INDEX_LIST returns the list of MSRs that can be passed
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to the KVM_GET_MSRS system ioctl. This lets userspace probe host capabilities
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and processor features that are exposed via MSRs (e.g., VMX capabilities).
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This list also varies by kvm version and host processor, but does not change
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otherwise.
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4.4 KVM_CHECK_EXTENSION
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@ -475,14 +483,22 @@ Support for this has been removed. Use KVM_SET_GUEST_DEBUG instead.
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4.18 KVM_GET_MSRS
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Capability: basic
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Capability: basic (vcpu), KVM_CAP_GET_MSR_FEATURES (system)
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Architectures: x86
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Type: vcpu ioctl
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Type: system ioctl, vcpu ioctl
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Parameters: struct kvm_msrs (in/out)
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Returns: 0 on success, -1 on error
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Returns: number of msrs successfully returned;
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-1 on error
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When used as a system ioctl:
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Reads the values of MSR-based features that are available for the VM. This
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is similar to KVM_GET_SUPPORTED_CPUID, but it returns MSR indices and values.
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The list of msr-based features can be obtained using KVM_GET_MSR_FEATURE_INDEX_LIST
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in a system ioctl.
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When used as a vcpu ioctl:
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Reads model-specific registers from the vcpu. Supported msr indices can
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be obtained using KVM_GET_MSR_INDEX_LIST.
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be obtained using KVM_GET_MSR_INDEX_LIST in a system ioctl.
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struct kvm_msrs {
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__u32 nmsrs; /* number of msrs in entries */
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@ -1095,6 +1095,8 @@ struct kvm_x86_ops {
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int (*mem_enc_op)(struct kvm *kvm, void __user *argp);
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int (*mem_enc_reg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
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int (*mem_enc_unreg_region)(struct kvm *kvm, struct kvm_enc_region *argp);
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int (*get_msr_feature)(struct kvm_msr_entry *entry);
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};
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struct kvm_arch_async_pf {
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@ -3869,6 +3869,11 @@ static int cr8_write_interception(struct vcpu_svm *svm)
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return 0;
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}
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static int svm_get_msr_feature(struct kvm_msr_entry *msr)
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{
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return 1;
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}
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static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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@ -6832,6 +6837,7 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
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.vcpu_unblocking = svm_vcpu_unblocking,
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.update_bp_intercept = update_bp_intercept,
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.get_msr_feature = svm_get_msr_feature,
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.get_msr = svm_get_msr,
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.set_msr = svm_set_msr,
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.get_segment_base = svm_get_segment_base,
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@ -3226,6 +3226,11 @@ static inline bool vmx_feature_control_msr_valid(struct kvm_vcpu *vcpu,
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return !(val & ~valid_bits);
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}
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static int vmx_get_msr_feature(struct kvm_msr_entry *msr)
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{
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return 1;
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}
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/*
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* Reads an msr value (of 'msr_index') into 'pdata'.
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* Returns 0 on success, non-0 otherwise.
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@ -12296,6 +12301,7 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = {
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.vcpu_put = vmx_vcpu_put,
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.update_bp_intercept = update_exception_bitmap,
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.get_msr_feature = vmx_get_msr_feature,
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.get_msr = vmx_get_msr,
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.set_msr = vmx_set_msr,
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.get_segment_base = vmx_get_segment_base,
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@ -1049,6 +1049,28 @@ static u32 emulated_msrs[] = {
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static unsigned num_emulated_msrs;
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/*
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* List of msr numbers which are used to expose MSR-based features that
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* can be used by a hypervisor to validate requested CPU features.
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*/
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static u32 msr_based_features[] = {
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};
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static unsigned int num_msr_based_features;
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static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
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{
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struct kvm_msr_entry msr;
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msr.index = index;
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if (kvm_x86_ops->get_msr_feature(&msr))
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return 1;
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*data = msr.data;
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return 0;
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}
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bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
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{
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if (efer & efer_reserved_bits)
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@ -2680,13 +2702,11 @@ static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
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int (*do_msr)(struct kvm_vcpu *vcpu,
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unsigned index, u64 *data))
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{
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int i, idx;
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int i;
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idx = srcu_read_lock(&vcpu->kvm->srcu);
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for (i = 0; i < msrs->nmsrs; ++i)
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if (do_msr(vcpu, entries[i].index, &entries[i].data))
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break;
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srcu_read_unlock(&vcpu->kvm->srcu, idx);
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return i;
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}
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case KVM_CAP_SET_BOOT_CPU_ID:
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case KVM_CAP_SPLIT_IRQCHIP:
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case KVM_CAP_IMMEDIATE_EXIT:
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case KVM_CAP_GET_MSR_FEATURES:
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r = 1;
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break;
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case KVM_CAP_ADJUST_CLOCK:
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goto out;
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r = 0;
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break;
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case KVM_GET_MSR_FEATURE_INDEX_LIST: {
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struct kvm_msr_list __user *user_msr_list = argp;
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struct kvm_msr_list msr_list;
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unsigned int n;
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r = -EFAULT;
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if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
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goto out;
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n = msr_list.nmsrs;
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msr_list.nmsrs = num_msr_based_features;
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if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
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goto out;
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r = -E2BIG;
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if (n < msr_list.nmsrs)
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goto out;
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r = -EFAULT;
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if (copy_to_user(user_msr_list->indices, &msr_based_features,
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num_msr_based_features * sizeof(u32)))
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goto out;
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r = 0;
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break;
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}
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case KVM_GET_MSRS:
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r = msr_io(NULL, argp, do_get_msr_feature, 1);
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break;
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}
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default:
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r = -EINVAL;
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r = 0;
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break;
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}
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case KVM_GET_MSRS:
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case KVM_GET_MSRS: {
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int idx = srcu_read_lock(&vcpu->kvm->srcu);
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r = msr_io(vcpu, argp, do_get_msr, 1);
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srcu_read_unlock(&vcpu->kvm->srcu, idx);
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break;
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case KVM_SET_MSRS:
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}
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case KVM_SET_MSRS: {
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int idx = srcu_read_lock(&vcpu->kvm->srcu);
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r = msr_io(vcpu, argp, do_set_msr, 0);
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srcu_read_unlock(&vcpu->kvm->srcu, idx);
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break;
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}
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case KVM_TPR_ACCESS_REPORTING: {
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struct kvm_tpr_access_ctl tac;
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j++;
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}
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num_emulated_msrs = j;
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for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
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struct kvm_msr_entry msr;
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msr.index = msr_based_features[i];
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if (kvm_x86_ops->get_msr_feature(&msr))
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continue;
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if (j < i)
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msr_based_features[j] = msr_based_features[i];
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j++;
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}
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num_msr_based_features = j;
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}
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static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
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@ -761,6 +761,7 @@ struct kvm_ppc_resize_hpt {
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#define KVM_TRACE_PAUSE __KVM_DEPRECATED_MAIN_0x07
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#define KVM_TRACE_DISABLE __KVM_DEPRECATED_MAIN_0x08
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#define KVM_GET_EMULATED_CPUID _IOWR(KVMIO, 0x09, struct kvm_cpuid2)
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#define KVM_GET_MSR_FEATURE_INDEX_LIST _IOWR(KVMIO, 0x0a, struct kvm_msr_list)
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/*
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* Extension capability list.
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#define KVM_CAP_S390_AIS_MIGRATION 150
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#define KVM_CAP_PPC_GET_CPU_CHAR 151
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#define KVM_CAP_S390_BPB 152
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#define KVM_CAP_GET_MSR_FEATURES 153
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#ifdef KVM_CAP_IRQ_ROUTING
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