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mmc: sdhci-acpi: Fix Braswell eMMC timeout clock frequency
Braswell eMMC host controller specifies an incorrect timeout clock frequncy in the capabilities registers. The correct value is 1 MHz. A similar fix was done for sdhci-pci, however in the sdhci-acpi case the HID/UID is not unique so the capabilities register values are matched also. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -137,6 +137,11 @@ static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
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/* Platform specific code during emmc proble slot goes here */
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if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
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sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
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sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
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host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
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return 0;
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}
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