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ARM: ep93xx: switch to SPARSEMEM 

The EP93xx has four chip selects that can be used for the SDRAM memory.
These chip selects are decoded to specify an address domain:

  SDCS3  0x00000000-0x0fffffff with Boot Option ASDO=1
  SDCS0  0xc0000000-0xcfffffff
  SDCS1  0xd0000000-0xdfffffff
  SDCS2  0xe0000000-x0efffffff
  SDCS3  0xf0000000-0xffffffff with Boot Option ASDO=0

Because of the row/column/bank architecture of SDRAM, the mapping of
these memories into the processor's memory space is discontiguous.

Most ep93xx systems only use one of the chip selects. For these systems,
ARCH_HAS_HOLES_MEMORYMODEL has worked fine to handle the discontiguous
memory.

But, some of the TS-72xx boards use multiple chip selects. The TS-7300 in
particular uses SDCS3 (with ASDO=1) and SDCS2. On that system with
ARCH_HAS_HOLES_MEMORYMODEL the SDCS2 memory does not get handled correctly
and results in the system not booting.

Change the EP93xx to ARCH_SPARSEMEM_ENABLE. This handles the discontiguous
memory for all configurations.

This has been tested on the following ep93xx platforms:

EDB9307A with 64 MiB on SDCS0
Vision EP9307 with 64 MiB on SDCS0
TS-7300 with 64 MiB on SDCS3 (with ASDO=1) and 64 MiB on SDCS2
sim.one with 64 MiB on SDCS0

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Russell King <linux@armlinux.org.uk>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
H Hartley Sweeten 2017-09-03 10:43:44 -07:00 committed by Linus Walleij
parent 2bd6bf03f4
commit 8032092772
1 changed files with 1 additions and 1 deletions
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arch/arm/Kconfig
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@ -378,7 +378,7 @@ config ARCH_EBSA110
config ARCH_EP93XX
bool "EP93xx-based"
select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SPARSEMEM_ENABLE
select ARM_AMBA
imply ARM_PATCH_PHYS_VIRT
select ARM_VIC