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drm/amd/display: fix counter in wait_for_no_pipes_pending
[Why] Wait counter is not being reset for each pipe. [How] Move counter reset into pipe loop scope. Signed-off-by: Roman Li <roman.li@amd.com> Reviewed-by: Zhan Liu <Zhan.Liu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 2 additions and 3 deletions
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@ -834,11 +834,10 @@ static void disable_dangling_plane(struct dc *dc, struct dc_state *context)
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static void wait_for_no_pipes_pending(struct dc *dc, struct dc_state *context)
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{
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int i;
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int count = 0;
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struct pipe_ctx *pipe;
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PERF_TRACE();
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for (i = 0; i < MAX_PIPES; i++) {
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pipe = &context->res_ctx.pipe_ctx[i];
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int count = 0;
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struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i];
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if (!pipe->plane_state)
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continue;
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