scsi: pm8001: Remove PM8001_READ_VPD
Remove the macro PM8001_READ_VPD used to define if a controller WWN should be retrieved from the device. Instead, define the better named boolean module parameter "read_wwn" to control this. The code to set a fixed address for a phy device address when read_wwn is set to false is simplified and fixed to avoid sparse warnings. Signed-off-by: Damien Le Moal <dlemoal@kernel.org> Link: https://lore.kernel.org/r/20230911232745.325149-11-dlemoal@kernel.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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205430290a
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@ -64,6 +64,10 @@ static bool pm8001_use_tasklet = true;
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module_param_named(use_tasklet, pm8001_use_tasklet, bool, 0444);
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MODULE_PARM_DESC(zoned, "Use MSIX interrupts. Default: true");
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static bool pm8001_read_wwn = true;
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module_param_named(read_wwn, pm8001_read_wwn, bool, 0444);
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MODULE_PARM_DESC(zoned, "Get WWN from the controller. Default: true");
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static struct scsi_transport_template *pm8001_stt;
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static int pm8001_init_ccb_tag(struct pm8001_hba_info *);
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@ -683,19 +687,30 @@ static void pm8001_post_sas_ha_init(struct Scsi_Host *shost,
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*/
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static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
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{
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u8 i, j;
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u8 sas_add[8];
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#ifdef PM8001_READ_VPD
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/* For new SPC controllers WWN is stored in flash vpd
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* For SPC/SPCve controllers WWN is stored in EEPROM
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* For Older SPC WWN is stored in NVMD
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*/
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DECLARE_COMPLETION_ONSTACK(completion);
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struct pm8001_ioctl_payload payload;
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unsigned long time_remaining;
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u8 sas_add[8];
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u16 deviceid;
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int rc;
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unsigned long time_remaining;
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u8 i, j;
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if (!pm8001_read_wwn) {
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__be64 dev_sas_addr = cpu_to_be64(0x50010c600047f9d0ULL);
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for (i = 0; i < pm8001_ha->chip->n_phy; i++)
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memcpy(&pm8001_ha->phy[i].dev_sas_addr, &dev_sas_addr,
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SAS_ADDR_SIZE);
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memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
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SAS_ADDR_SIZE);
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return 0;
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}
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/*
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* For new SPC controllers WWN is stored in flash vpd. For SPC/SPCve
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* controllers WWN is stored in EEPROM. And for Older SPC WWN is stored
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* in NVMD.
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*/
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if (PM8001_CHIP_DISP->fatal_errors(pm8001_ha)) {
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pm8001_dbg(pm8001_ha, FAIL, "controller is in fatal error state\n");
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return -EIO;
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@ -769,16 +784,7 @@ static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
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pm8001_ha->phy[i].dev_sas_addr);
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}
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kfree(payload.func_specific);
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#else
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for (i = 0; i < pm8001_ha->chip->n_phy; i++) {
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pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL;
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pm8001_ha->phy[i].dev_sas_addr =
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cpu_to_be64((u64)
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(*(u64 *)&pm8001_ha->phy[i].dev_sas_addr));
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}
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memcpy(pm8001_ha->sas_addr, &pm8001_ha->phy[0].dev_sas_addr,
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SAS_ADDR_SIZE);
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#endif
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return 0;
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}
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@ -788,13 +794,13 @@ static int pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha)
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*/
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static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
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{
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#ifdef PM8001_READ_VPD
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/*OPTION ROM FLASH read for the SPC cards */
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DECLARE_COMPLETION_ONSTACK(completion);
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struct pm8001_ioctl_payload payload;
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int rc;
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if (!pm8001_read_wwn)
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return 0;
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pm8001_ha->nvmd_completion = &completion;
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/* SAS ADDRESS read from flash / EEPROM */
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payload.minor_function = 6;
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@ -813,7 +819,7 @@ static int pm8001_get_phy_settings_info(struct pm8001_hba_info *pm8001_ha)
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wait_for_completion(&completion);
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pm8001_set_phy_profile(pm8001_ha, sizeof(u8), payload.func_specific);
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kfree(payload.func_specific);
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#endif
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return 0;
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}
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@ -85,9 +85,6 @@ do { \
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extern bool pm8001_use_msix;
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#define PM8001_READ_VPD
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#define IS_SPCV_12G(dev) ((dev->device == 0X8074) \
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|| (dev->device == 0X8076) \
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|| (dev->device == 0X8077) \
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