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drm/i915: Only apply a rmw mmio update if the value changes

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If we try to clear, or even set, a bit in the register that doesn't
change the register state; skip the write. There's a slight danger in
that the register acts as a latch-on-write, but I do not think we use a
rmw cycle with any such latch registers.

Suggested-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190917080029.27632-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2019-09-17 09:00:29 +01:00
parent bb120e1171
commit 80fa64d620
1 changed files with 10 additions and 10 deletions
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20
drivers/gpu/drm/i915/intel_uncore.h
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@ -378,23 +378,23 @@ intel_uncore_read64_2x32(struct intel_uncore *uncore,
static inline void intel_uncore_rmw(struct intel_uncore *uncore,
i915_reg_t reg, u32 clear, u32 set)
{
u32 val;
u32 old, val;
val = intel_uncore_read(uncore, reg);
val &= ~clear;
val |= set;
intel_uncore_write(uncore, reg, val);
old = intel_uncore_read(uncore, reg);
val = (old & ~clear) | set;
if (val != old)
intel_uncore_write(uncore, reg, val);
}
static inline void intel_uncore_rmw_fw(struct intel_uncore *uncore,
i915_reg_t reg, u32 clear, u32 set)
{
u32 val;
u32 old, val;
val = intel_uncore_read_fw(uncore, reg);
val &= ~clear;
val |= set;
intel_uncore_write_fw(uncore, reg, val);
old = intel_uncore_read_fw(uncore, reg);
val = (old & ~clear) | set;
if (val != old)
intel_uncore_write_fw(uncore, reg, val);
}
static inline int intel_uncore_write_and_verify(struct intel_uncore *uncore,