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bnx2x: EMAC reset
The NIG_ENABLE does not reset the emac. Replace it with explicit reset Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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2 changed files with 6 additions and 2 deletions
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@ -297,8 +297,10 @@ static u8 bnx2x_emac_enable(struct link_params *params,
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port*4, 0);
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}
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/* enable emac */
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REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 1);
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bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE,
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EMAC_RX_MODE_RESET);
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bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_TX_MODE,
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EMAC_TX_MODE_RESET);
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if (CHIP_REV_IS_SLOW(bp)) {
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/* config GMII mode */
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@ -5173,9 +5173,11 @@
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#define EMAC_RX_MODE_FLOW_EN (1L<<2)
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#define EMAC_RX_MODE_KEEP_VLAN_TAG (1L<<10)
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#define EMAC_RX_MODE_PROMISCUOUS (1L<<8)
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#define EMAC_RX_MODE_RESET (1L<<0)
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#define EMAC_RX_MTU_SIZE_JUMBO_ENA (1L<<31)
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#define EMAC_TX_MODE_EXT_PAUSE_EN (1L<<3)
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#define EMAC_TX_MODE_FLOW_EN (1L<<4)
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#define EMAC_TX_MODE_RESET (1L<<0)
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#define MISC_REGISTERS_GPIO_0 0
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#define MISC_REGISTERS_GPIO_1 1
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#define MISC_REGISTERS_GPIO_2 2
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