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Code Issues Releases Wiki Activity

drm/omap: omap_display_timings: rename x_res to hactive

Browse source 
In preparation to move the stack to use the generic videmode struct for
display timing information rename the x_res member to hactive.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Peter Ujfalusi 2016-09-22 14:06:46 +03:00 committed by Tomi Valkeinen
parent bd9642b9b8
commit 81899060de
22 changed files with 49 additions and 49 deletions
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2
drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
View file

@ -30,7 +30,7 @@ struct panel_drv_data {
};
static const struct omap_video_timings tvc_pal_timings = {
.x_res = 720,
.hactive = 720,
.y_res = 574,
.pixelclock = 13500000,
.hsw = 64,

2
drivers/gpu/drm/omapdrm/displays/connector-dvi.c
View file

@ -20,7 +20,7 @@
#include "../dss/omapdss.h"
static const struct omap_video_timings dvic_default_timings = {
.x_res = 640,
.hactive = 640,
.y_res = 480,
.pixelclock = 23500000,

2
drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
View file

@ -22,7 +22,7 @@
#include "../dss/omapdss.h"
static const struct omap_video_timings hdmic_default_timings = {
.x_res = 640,
.hactive = 640,
.y_res = 480,
.pixelclock = 25175000,
.hsw = 96,

8
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
View file

@ -382,7 +382,7 @@ static const struct backlight_ops dsicm_bl_ops = {
static void dsicm_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
{
*xres = dssdev->panel.timings.x_res;
*xres = dssdev->panel.timings.hactive;
*yres = dssdev->panel.timings.y_res;
}
@ -892,7 +892,7 @@ static int dsicm_update(struct omap_dss_device *dssdev,
/* XXX no need to send this every frame, but dsi break if not done */
r = dsicm_set_update_window(ddata, 0, 0,
dssdev->panel.timings.x_res,
dssdev->panel.timings.hactive,
dssdev->panel.timings.y_res);
if (r)
goto err;
@ -1024,7 +1024,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev,
}
size = min(w * h * 3,
dssdev->panel.timings.x_res *
dssdev->panel.timings.hactive *
dssdev->panel.timings.y_res * 3);
in->ops.dsi->bus_lock(in);
@ -1186,7 +1186,7 @@ static int dsicm_probe(struct platform_device *pdev)
if (r)
return r;
ddata->timings.x_res = 864;
ddata->timings.hactive = 864;
ddata->timings.y_res = 480;
ddata->timings.pixelclock = 864 * 480 * 60;

2
drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
View file

@ -20,7 +20,7 @@
#include "../dss/omapdss.h"
static struct omap_video_timings lb035q02_timings = {
.x_res = 320,
.hactive = 320,
.y_res = 240,
.pixelclock = 6500000,

2
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
View file

@ -66,7 +66,7 @@ static const struct {
};
static const struct omap_video_timings nec_8048_panel_timings = {
.x_res = LCD_XRES,
.hactive = LCD_XRES,
.y_res = LCD_YRES,
.pixelclock = LCD_PIXEL_CLOCK,
.hfp = 6,

2
drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
View file

@ -36,7 +36,7 @@ struct panel_drv_data {
};
static const struct omap_video_timings sharp_ls_timings = {
.x_res = 480,
.hactive = 480,
.y_res = 640,
.pixelclock = 19200000,

2
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
View file

@ -93,7 +93,7 @@ struct panel_drv_data {
};
static const struct omap_video_timings acx565akm_panel_timings = {
.x_res = 800,
.hactive = 800,
.y_res = 480,
.pixelclock = 24000000,
.hfp = 28,

2
drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
View file

@ -43,7 +43,7 @@ struct panel_drv_data {
};
static struct omap_video_timings td028ttec1_panel_timings = {
.x_res = 480,
.hactive = 480,
.y_res = 640,
.pixelclock = 22153000,
.hfp = 24,

2
drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
View file

@ -73,7 +73,7 @@ struct panel_drv_data {
};
static const struct omap_video_timings tpo_td043_timings = {
.x_res = 800,
.hactive = 800,
.y_res = 480,
.pixelclock = 36000000,

16
drivers/gpu/drm/omapdrm/dss/dispc.c
View file

@ -2189,7 +2189,7 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk,
u64 val, blank;
int i;
nonactive = t->x_res + t->hfp + t->hsw + t->hbp - out_width;
nonactive = t->hactive + t->hfp + t->hsw + t->hbp - out_width;
i = 0;
if (out_height < height)
@ -2242,7 +2242,7 @@ static unsigned long calc_core_clk_five_taps(unsigned long pclk,
return (unsigned long) pclk;
if (height > out_height) {
unsigned int ppl = mgr_timings->x_res;
unsigned int ppl = mgr_timings->hactive;
tmp = (u64)pclk * height * out_width;
do_div(tmp, 2 * out_height * ppl);
@ -2819,7 +2819,7 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi,
const u8 zorder = 0, global_alpha = 0;
const bool replication = false;
bool truncation;
int in_width = mgr_timings->x_res;
int in_width = mgr_timings->hactive;
int in_height = mgr_timings->y_res;
enum omap_overlay_caps caps =
OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA;
@ -3118,7 +3118,7 @@ static bool _dispc_mgr_pclk_ok(enum omap_channel channel,
bool dispc_mgr_timings_ok(enum omap_channel channel,
const struct omap_video_timings *timings)
{
if (!_dispc_mgr_size_ok(timings->x_res, timings->y_res))
if (!_dispc_mgr_size_ok(timings->hactive, timings->y_res))
return false;
if (!_dispc_mgr_pclk_ok(channel, timings->pixelclock))
@ -3259,7 +3259,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
unsigned long ht, vt;
struct omap_video_timings t = *timings;
DSSDBG("channel %d xres %u yres %u\n", channel, t.x_res, t.y_res);
DSSDBG("channel %d xres %u yres %u\n", channel, t.hactive, t.y_res);
if (!dispc_mgr_timings_ok(channel, &t)) {
BUG();
@ -3271,7 +3271,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
t.vfp, t.vbp, t.vsync_level, t.hsync_level,
t.data_pclk_edge, t.de_level, t.sync_pclk_edge);
xtot = t.x_res + t.hfp + t.hsw + t.hbp;
xtot = t.hactive + t.hfp + t.hsw + t.hbp;
ytot = t.y_res + t.vfp + t.vsw + t.vbp;
ht = timings->pixelclock / xtot;
@ -3294,7 +3294,7 @@ void dispc_mgr_set_timings(enum omap_channel channel,
19, 17);
}
dispc_mgr_set_size(channel, t.x_res, t.y_res);
dispc_mgr_set_size(channel, t.hactive, t.y_res);
}
EXPORT_SYMBOL(dispc_mgr_set_timings);
@ -4220,7 +4220,7 @@ static const struct dispc_errata_i734_data {
struct dss_lcd_mgr_config lcd_conf;
} i734 = {
.timings = {
.x_res = 8, .y_res = 1,
.hactive = 8, .y_res = 1,
.pixelclock = 16000000,
.hsw = 8, .hfp = 4, .hbp = 4,
.vsw = 1, .vfp = 1, .vbp = 1,

6
drivers/gpu/drm/omapdrm/dss/display.c
View file

@ -35,7 +35,7 @@
void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
{
*xres = dssdev->panel.timings.x_res;
*xres = dssdev->panel.timings.hactive;
*yres = dssdev->panel.timings.y_res;
}
EXPORT_SYMBOL(omapdss_default_get_resolution);
@ -224,7 +224,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
memset(ovt, 0, sizeof(*ovt));
ovt->pixelclock = vm->pixelclock;
ovt->x_res = vm->hactive;
ovt->hactive = vm->hactive;
ovt->hbp = vm->hback_porch;
ovt->hfp = vm->hfront_porch;
ovt->hsw = vm->hsync_len;
@ -257,7 +257,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
vm->pixelclock = ovt->pixelclock;
vm->hactive = ovt->x_res;
vm->hactive = ovt->hactive;
vm->hback_porch = ovt->hbp;
vm->hfront_porch = ovt->hfp;
vm->hsync_len = ovt->hsw;

2
drivers/gpu/drm/omapdrm/dss/dpi.c
View file

@ -512,7 +512,7 @@ static int dpi_check_timings(struct omap_dss_device *dssdev,
struct dpi_clk_calc_ctx ctx;
bool ok;
if (timings->x_res % 8 != 0)
if (timings->hactive % 8 != 0)
return -EINVAL;
if (!dispc_mgr_timings_ok(channel, timings))

20
drivers/gpu/drm/omapdrm/dss/dsi.c
View file

@ -3326,7 +3326,7 @@ static void dsi_config_vp_num_line_buffers(struct platform_device *dsidev)
* Don't use line buffers if width is greater than the video
* port's line buffer size
*/
if (dsi->line_buffer_size <= timings->x_res * bpp / 8)
if (dsi->line_buffer_size <= timings->hactive * bpp / 8)
num_line_buffers = 0;
else
num_line_buffers = 2;
@ -3494,7 +3494,7 @@ static void dsi_config_cmd_mode_interleaving(struct platform_device *dsidev)
exiths_clk = ths_exit + tclk_trail;
width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8);
width_bytes = DIV_ROUND_UP(timings->hactive * bpp, 8);
bllp = hbp + hfp + hsa + DIV_ROUND_UP(width_bytes + 6, ndl);
if (!hsa_blanking_mode) {
@ -3713,7 +3713,7 @@ static void dsi_proto_timings(struct platform_device *dsidev)
t_he = hsync_end ?
((hsa == 0 && ndl == 3) ? 1 : DIV_ROUND_UP(4, ndl)) : 0;
width_bytes = DIV_ROUND_UP(timings->x_res * bpp, 8);
width_bytes = DIV_ROUND_UP(timings->hactive * bpp, 8);
/* TL = t_HS + HSA + t_HE + HFP + ceil((WC + 6) / NDL) + HBP */
tl = DIV_ROUND_UP(4, ndl) + (hsync_end ? hsa : 0) + t_he + hfp +
@ -3856,7 +3856,7 @@ static int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel)
/* MODE, 1 = video mode */
REG_FLD_MOD(dsidev, DSI_VC_CTRL(channel), 1, 4, 4);
word_count = DIV_ROUND_UP(dsi->timings.x_res * bpp, 8);
word_count = DIV_ROUND_UP(dsi->timings.hactive * bpp, 8);
dsi_vc_write_long_header(dsidev, channel, data_type,
word_count, 0);
@ -3918,7 +3918,7 @@ static void dsi_update_screen_dispc(struct platform_device *dsidev)
int r;
const unsigned channel = dsi->update_channel;
const unsigned line_buf_size = dsi->line_buffer_size;
u16 w = dsi->timings.x_res;
u16 w = dsi->timings.hactive;
u16 h = dsi->timings.y_res;
DSSDBG("dsi_update_screen_dispc(%dx%d)\n", w, h);
@ -4056,7 +4056,7 @@ static int dsi_update(struct omap_dss_device *dssdev, int channel,
dsi->framedone_callback = callback;
dsi->framedone_data = data;
dw = dsi->timings.x_res;
dw = dsi->timings.hactive;
dh = dsi->timings.y_res;
#ifdef DSI_PERF_MEASURE
@ -4361,7 +4361,7 @@ static void print_dispc_vm(const char *str, const struct omap_video_timings *t)
unsigned long pck = t->pixelclock;
int hact, bl, tot;
hact = t->x_res;
hact = t->hactive;
bl = t->hsw + t->hbp + t->hfp;
tot = hact + bl;
@ -4402,7 +4402,7 @@ static void print_dsi_dispc_vm(const char *str,
vm.hsw = div64_u64((u64)(t->hsa + t->hse) * pck, byteclk);
vm.hbp = div64_u64((u64)t->hbp * pck, byteclk);
vm.hfp = div64_u64((u64)t->hfp * pck, byteclk);
vm.x_res = t->hact;
vm.hactive = t->hact;
print_dispc_vm(str, &vm);
}
@ -4421,7 +4421,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
*t = *ctx->config->timings;
t->pixelclock = pck;
t->x_res = ctx->config->timings->x_res;
t->hactive = ctx->config->timings->hactive;
t->y_res = ctx->config->timings->y_res;
t->hsw = t->hfp = t->hbp = t->vsw = 1;
t->vfp = t->vbp = 0;
@ -4525,7 +4525,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
dispc_pck = ctx->dispc_cinfo.pck;
dispc_tput = (u64)dispc_pck * bitspp;
xres = req_vm->x_res;
xres = req_vm->hactive;
panel_hbl = req_vm->hfp + req_vm->hbp + req_vm->hsw;
panel_htot = xres + panel_hbl;

2
drivers/gpu/drm/omapdrm/dss/hdmi4.c
View file

@ -171,7 +171,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
p = &hdmi.cfg.timings;
DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res);
pc = p->pixelclock;
if (p->double_pixel)

2
drivers/gpu/drm/omapdrm/dss/hdmi5.c
View file

@ -183,7 +183,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
p = &hdmi.cfg.timings;
DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
DSSDBG("hdmi_power_on hactive= %d y_res = %d\n", p->hactive, p->y_res);
pc = p->pixelclock;
if (p->double_pixel)

6
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
View file

@ -316,7 +316,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
}
if (cfg->timings.double_pixel) {
video_cfg->v_fc_config.timings.x_res *= 2;
video_cfg->v_fc_config.timings.hactive *= 2;
video_cfg->hblank *= 2;
video_cfg->v_fc_config.timings.hfp *= 2;
video_cfg->v_fc_config.timings.hsw *= 2;
@ -348,9 +348,9 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
/* set x resolution */
REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV1,
cfg->v_fc_config.timings.x_res >> 8, 4, 0);
cfg->v_fc_config.timings.hactive >> 8, 4, 0);
REG_FLD_MOD(base, HDMI_CORE_FC_INHACTIV0,
cfg->v_fc_config.timings.x_res & 0xFF, 7, 0);
cfg->v_fc_config.timings.hactive & 0xFF, 7, 0);
/* set y resolution */
REG_FLD_MOD(base, HDMI_CORE_FC_INVACTIV1,

2
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
View file

@ -199,7 +199,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
video_fmt->packing_mode = HDMI_PACK_10b_RGB_YUV444;
video_fmt->y_res = param->timings.y_res;
video_fmt->x_res = param->timings.x_res;
video_fmt->x_res = param->timings.hactive;
timings->hbp = param->timings.hbp;
timings->hfp = param->timings.hfp;

2
drivers/gpu/drm/omapdrm/dss/omapdss.h
View file

@ -301,7 +301,7 @@ struct omap_dss_dsi_config {
struct omap_video_timings {
/* Unit: pixels */
u16 x_res;
u16 hactive;
/* Unit: pixels */
u16 y_res;
/* Unit: Hz */

6
drivers/gpu/drm/omapdrm/dss/rfbi.c
View file

@ -308,7 +308,7 @@ static int rfbi_transfer_area(struct omap_dss_device *dssdev,
u32 l;
int r;
struct omap_overlay_manager *mgr = rfbi.output.manager;
u16 width = rfbi.timings.x_res;
u16 width = rfbi.timings.hactive;
u16 height = rfbi.timings.y_res;
/*BUG_ON(callback == 0);*/
@ -777,7 +777,7 @@ static int rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
static void rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h)
{
rfbi.timings.x_res = w;
rfbi.timings.hactive = w;
rfbi.timings.y_res = h;
}
@ -854,7 +854,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
dss_mgr_set_lcd_config(mgr, &mgr_config);
/*
* Set rfbi.timings with default values, the x_res and y_res fields
* Set rfbi.timings with default values, the hactive and y_res fields
* are expected to be already configured by the panel driver via
* omapdss_rfbi_set_size()
*/

4
drivers/gpu/drm/omapdrm/dss/venc.c
View file

@ -263,7 +263,7 @@ static const struct venc_config venc_config_pal_bdghi = {
};
const struct omap_video_timings omap_dss_pal_timings = {
.x_res = 720,
.hactive = 720,
.y_res = 574,
.pixelclock = 13500000,
.hsw = 64,
@ -284,7 +284,7 @@ const struct omap_video_timings omap_dss_pal_timings = {
EXPORT_SYMBOL(omap_dss_pal_timings);
const struct omap_video_timings omap_dss_ntsc_timings = {
.x_res = 720,
.hactive = 720,
.y_res = 482,
.pixelclock = 13500000,
.hsw = 64,

4
drivers/gpu/drm/omapdrm/omap_connector.c
View file

@ -47,7 +47,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
{
mode->clock = timings->pixelclock / 1000;
mode->hdisplay = timings->x_res;
mode->hdisplay = timings->hactive;
mode->hsync_start = mode->hdisplay + timings->hfp;
mode->hsync_end = mode->hsync_start + timings->hsw;
mode->htotal = mode->hsync_end + timings->hbp;
@ -81,7 +81,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
{
timings->pixelclock = mode->clock * 1000;
timings->x_res = mode->hdisplay;
timings->hactive = mode->hdisplay;
timings->hfp = mode->hsync_start - mode->hdisplay;
timings->hsw = mode->hsync_end - mode->hsync_start;
timings->hbp = mode->htotal - mode->hsync_end;