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arm64: dts: imx8-ss-dma: fix adc lpcg indices
adc0_lpcg: clock-controller@5ac80000 {
... Col1 Col2
clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>, // 0 0
<&dma_ipg_clk>; // 1 4
clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_4>;
};
Col1: index, which existing dts try to get.
Col2: actual index in lpcg driver.
adc0: adc@5a880000 {
clocks = <&adc0_lpcg 0>, <&adc0_lpcg 1>;
^^ ^^
clocks = <&adc0_lpcg IMX_LPCG_CLK_0>, <&adc0_lpcg IMX_LPCG_CLK_4>;
Arg0 is divided by 4 in lpcg driver. So adc get IMX_SC_PM_CLK_PER by
<&adc0_lpcg 0>, <&adc0_lpcg 1>. Although function can work, code logic is
wrong. Fix it by using correct indices.
Cc: stable@vger.kernel.org
Fixes: 1db044b25d
("arm64: dts: imx8dxl: add adc0 support")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
parent
9055d87bce
commit
81975080f1
1 changed files with 4 additions and 4 deletions
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@ -355,8 +355,8 @@ adc0: adc@5a880000 {
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reg = <0x5a880000 0x10000>;
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interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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clocks = <&adc0_lpcg 0>,
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<&adc0_lpcg 1>;
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clocks = <&adc0_lpcg IMX_LPCG_CLK_0>,
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<&adc0_lpcg IMX_LPCG_CLK_4>;
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clock-names = "per", "ipg";
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assigned-clocks = <&clk IMX_SC_R_ADC_0 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <24000000>;
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@ -370,8 +370,8 @@ adc1: adc@5a890000 {
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reg = <0x5a890000 0x10000>;
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interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&gic>;
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clocks = <&adc1_lpcg 0>,
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<&adc1_lpcg 1>;
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clocks = <&adc1_lpcg IMX_LPCG_CLK_0>,
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<&adc1_lpcg IMX_LPCG_CLK_4>;
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clock-names = "per", "ipg";
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assigned-clocks = <&clk IMX_SC_R_ADC_1 IMX_SC_PM_CLK_PER>;
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assigned-clock-rates = <24000000>;
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