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mvebu fixes for v3.16 (round 3)
- Fix SMP boot on 38x/375 in big endian - Fix operand list for pmsu on 370/XP - Fix coherency bus notifiers -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABAgAGBQJTyZAQAAoJEP45WPkGe8Zn+DIQAIWvUhQ/7rsThFThmlsa4t01 8l4PqWlPznHHfSAfcM5JZtGBpKvqHhf+e6Hn8wPXek4u7v1x2K6dREk2JgsGZQMP rsA2Ajn8jseFQb+iBnzdr1eV0AkztlGy0pJ4N+S4pogp4pzn6WPPNGz7P9UUzW/U U2I8NycTqzsq8siODK/AbqLfFfok2M/++QgNOdEli1cQ44NdYyAzVLeqe/C9Ou6K fn6RdscbvK/jWmrWi9CS4lhnhNkG8HBxxpzF4Rm06dWDU6z+B/HECq8yjHJlX9rx EsxiJRV6nzUiws+/o19CUsl/lsJP0pfiTDXCoiUUhOovYUukm632ySdG5QfjnYaK zsRw9hBnHCfHW5QEt6NaY5fVknnQPmJMM7WsW9B7PtQX4Rl38CWhLdq3LAbPVv9V ze1AllUSmBLTYuQHFMuA602ZzngFcw1c+ZOmfrOpX+QYlyiv1CkqUOXiVGHNb2Nn NPiCZaDp8d+JvWloOme0aZX+XfgfUOeXxogtYCtFBTGe9C+P6oqzPni3hqcvL7PA PUo6BRe1KIOaQuUm0Eh/XqWC5Nyo0gcXm1oM8JgovVTT6RQndPIQLfO9isOa5A+b PaLrAYtzHge+cCU4TJShYzjcVGzz1K2hsINjJ9NlW8172LbC1g5wQWrUVPFHrLuz WoZYmkmNzNd8EGQwXdkj =tq91 -----END PGP SIGNATURE----- Merge tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu into fixes Merge "mvebu fixes for v3.16 (round 3)" from Jason Cooper: - Fix SMP boot on 38x/375 in big endian - Fix operand list for pmsu on 370/XP - Fix coherency bus notifiers * tag 'mvebu-fixes-3.16-3' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Fix coherency bus notifiers by using separate notifiers ARM: mvebu: Fix the operand list in the inline asm of armada_370_xp_pmsu_idle_enter ARM: mvebu: fix SMP boot for Armada 38x and Armada 375 Z1 in big endian Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
81cca645b6
3 changed files with 18 additions and 7 deletions
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@ -292,6 +292,10 @@ static struct notifier_block mvebu_hwcc_nb = {
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.notifier_call = mvebu_hwcc_notifier,
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.notifier_call = mvebu_hwcc_notifier,
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};
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};
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static struct notifier_block mvebu_hwcc_pci_nb = {
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.notifier_call = mvebu_hwcc_notifier,
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};
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static void __init armada_370_coherency_init(struct device_node *np)
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static void __init armada_370_coherency_init(struct device_node *np)
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{
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{
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struct resource res;
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struct resource res;
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@ -427,7 +431,7 @@ static int __init coherency_pci_init(void)
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{
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{
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if (coherency_available())
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if (coherency_available())
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bus_register_notifier(&pci_bus_type,
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bus_register_notifier(&pci_bus_type,
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&mvebu_hwcc_nb);
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&mvebu_hwcc_pci_nb);
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return 0;
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return 0;
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}
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}
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@ -15,6 +15,8 @@
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#include <linux/linkage.h>
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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__CPUINIT
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__CPUINIT
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#define CPU_RESUME_ADDR_REG 0xf10182d4
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#define CPU_RESUME_ADDR_REG 0xf10182d4
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@ -22,13 +24,18 @@
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.global armada_375_smp_cpu1_enable_code_end
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.global armada_375_smp_cpu1_enable_code_end
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armada_375_smp_cpu1_enable_code_start:
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armada_375_smp_cpu1_enable_code_start:
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ldr r0, [pc, #4]
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ARM_BE8(setend be)
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adr r0, 1f
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ldr r0, [r0]
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ldr r1, [r0]
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ldr r1, [r0]
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ARM_BE8(rev r1, r1)
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mov pc, r1
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mov pc, r1
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1:
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.word CPU_RESUME_ADDR_REG
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.word CPU_RESUME_ADDR_REG
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armada_375_smp_cpu1_enable_code_end:
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armada_375_smp_cpu1_enable_code_end:
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ENTRY(mvebu_cortex_a9_secondary_startup)
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ENTRY(mvebu_cortex_a9_secondary_startup)
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ARM_BE8(setend be)
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bl v7_invalidate_l1
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bl v7_invalidate_l1
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b secondary_startup
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b secondary_startup
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ENDPROC(mvebu_cortex_a9_secondary_startup)
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ENDPROC(mvebu_cortex_a9_secondary_startup)
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@ -201,12 +201,12 @@ static noinline int do_armada_370_xp_cpu_suspend(unsigned long deepidle)
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/* Test the CR_C bit and set it if it was cleared */
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/* Test the CR_C bit and set it if it was cleared */
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asm volatile(
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0 \n\t"
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"mrc p15, 0, r0, c1, c0, 0 \n\t"
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"tst %0, #(1 << 2) \n\t"
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"tst r0, #(1 << 2) \n\t"
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"orreq %0, %0, #(1 << 2) \n\t"
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"orreq r0, r0, #(1 << 2) \n\t"
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"mcreq p15, 0, %0, c1, c0, 0 \n\t"
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"mcreq p15, 0, r0, c1, c0, 0 \n\t"
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"isb "
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"isb "
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: : "r" (0));
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: : : "r0");
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pr_warn("Failed to suspend the system\n");
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pr_warn("Failed to suspend the system\n");
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