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powerpc: perf_event: Enable SDAR in continous sample mode
In continuous sampling mode we want the SDAR to update. While we can select between dcache misses and ERAT (L1-TLB) misses, a decent default is to enable both. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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6 changed files with 5 additions and 19 deletions
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@ -489,6 +489,8 @@
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#define SPRN_MMCR1 798
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#define SPRN_MMCRA 0x312
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#define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */
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#define MMCRA_SDAR_DCACHE_MISS 0x40000000UL
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#define MMCRA_SDAR_ERAT_MISS 0x20000000UL
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#define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */
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#define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */
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#define MMCRA_SLOT 0x07000000UL /* SLOT bits (37-39) */
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@ -72,10 +72,6 @@
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#define MMCR1_PMCSEL_SH(n) (MMCR1_PMC1SEL_SH - (n) * 8)
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#define MMCR1_PMCSEL_MSK 0x7f
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/*
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* Bits in MMCRA
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*/
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/*
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* Layout of constraint bits:
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* 6666555555555544444444443333333333222222222211111111110000000000
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@ -72,10 +72,6 @@
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#define MMCR1_PMCSEL_SH(n) (MMCR1_PMC1SEL_SH - (n) * 8)
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#define MMCR1_PMCSEL_MSK 0x7f
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/*
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* Bits in MMCRA
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*/
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/*
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* Layout of constraint bits:
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* 6666555555555544444444443333333333222222222211111111110000000000
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@ -390,7 +386,7 @@ static int power5_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = 0;
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unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
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unsigned int pmc, unit, byte, psel;
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unsigned int ttm, grp;
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int i, isbus, bit, grsel;
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@ -178,7 +178,7 @@ static int p6_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = 0;
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unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
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int i;
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unsigned int pmc, ev, b, u, s, psel;
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unsigned int ttmset = 0;
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@ -50,10 +50,6 @@
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#define MMCR1_PMCSEL_SH(n) (MMCR1_PMC1SEL_SH - (n) * 8)
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#define MMCR1_PMCSEL_MSK 0xff
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/*
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* Bits in MMCRA
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*/
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/*
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* Layout of constraint bits:
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* 6666555555555544444444443333333333222222222211111111110000000000
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@ -230,7 +226,7 @@ static int power7_compute_mmcr(u64 event[], int n_ev,
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unsigned int hwc[], unsigned long mmcr[])
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{
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unsigned long mmcr1 = 0;
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unsigned long mmcra = 0;
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unsigned long mmcra = MMCRA_SDAR_DCACHE_MISS | MMCRA_SDAR_ERAT_MISS;
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unsigned int pmc, unit, combine, l2sel, psel;
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unsigned int pmc_inuse = 0;
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int i;
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@ -83,10 +83,6 @@ static short mmcr1_adder_bits[8] = {
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MMCR1_PMC8_ADDER_SEL_SH
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};
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/*
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* Bits in MMCRA
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*/
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/*
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* Layout of constraint bits:
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* 6666555555555544444444443333333333222222222211111111110000000000
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