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cirrusfb: acceleration improvements
- Fix color expansion for 16bpp and 32bpp modes in the cirrusfb_RectFill(). - Make a function with a common blitter code (cirrusfb_set_blitter). - Add fb_sync function to allow a higher layer synchronize with the blitter. - Kill one redundant blitter reset. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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78d780e072
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8343c89c4f
1 changed files with 76 additions and 112 deletions
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@ -381,7 +381,7 @@ static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
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static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
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u_short x, u_short y,
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u_short width, u_short height,
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u_char color, u_short line_length);
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u32 color, u_short line_length);
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static void bestclock(long freq, int *nom, int *den, int *div);
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@ -1550,9 +1550,6 @@ static void init_vgachip(struct fb_info *info)
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/* unlock all extension registers */
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vga_wseq(cinfo->regbase, CL_SEQR6, 0x12);
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/* reset blitter */
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vga_wgfx(cinfo->regbase, CL_GR31, 0x04);
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switch (cinfo->btype) {
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case BT_GD5480:
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vga_wseq(cinfo->regbase, CL_SEQRF, 0x98);
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@ -1747,6 +1744,17 @@ static void switch_monitor(struct cirrusfb_info *cinfo, int on)
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/* Linux 2.6-style accelerated functions */
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/******************************************/
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static int cirrusfb_sync(struct fb_info *info)
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{
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struct cirrusfb_info *cinfo = info->par;
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if (!is_laguna(cinfo)) {
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while (vga_rgfx(cinfo->regbase, CL_GR31) & 0x03)
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cpu_relax();
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}
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return 0;
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}
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static void cirrusfb_fillrect(struct fb_info *info,
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const struct fb_fillrect *region)
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{
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@ -1966,6 +1974,7 @@ static struct fb_ops cirrusfb_ops = {
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.fb_blank = cirrusfb_blank,
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.fb_fillrect = cirrusfb_fillrect,
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.fb_copyarea = cirrusfb_copyarea,
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.fb_sync = cirrusfb_sync,
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.fb_imageblit = cirrusfb_imageblit,
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};
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@ -2586,7 +2595,6 @@ static void RClut(struct cirrusfb_info *cinfo, unsigned char regnum, unsigned ch
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/* FIXME: use interrupts instead */
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static void cirrusfb_WaitBLT(u8 __iomem *regbase)
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{
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/* now busy-wait until we're done */
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while (vga_rgfx(regbase, CL_GR31) & 0x08)
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cpu_relax();
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}
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@ -2597,58 +2605,12 @@ static void cirrusfb_WaitBLT(u8 __iomem *regbase)
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perform accelerated "scrolling"
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********************************************************************/
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static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
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u_short curx, u_short cury,
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u_short destx, u_short desty,
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u_short width, u_short height,
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u_short line_length)
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static void cirrusfb_set_blitter(u8 __iomem *regbase,
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u_short nwidth, u_short nheight,
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u_long nsrc, u_long ndest,
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u_short bltmode, u_short line_length)
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{
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u_short nwidth, nheight;
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u_long nsrc, ndest;
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u_char bltmode;
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nwidth = width - 1;
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nheight = height - 1;
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bltmode = 0x00;
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/* if source adr < dest addr, do the Blt backwards */
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if (cury <= desty) {
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if (cury == desty) {
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/* if src and dest are on the same line, check x */
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if (curx < destx)
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bltmode |= 0x01;
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} else
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bltmode |= 0x01;
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}
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if (!bltmode) {
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/* standard case: forward blitting */
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nsrc = (cury * line_length) + curx;
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ndest = (desty * line_length) + destx;
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} else {
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/* this means start addresses are at the end,
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* counting backwards
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*/
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nsrc = cury * line_length + curx +
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nheight * line_length + nwidth;
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ndest = desty * line_length + destx +
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nheight * line_length + nwidth;
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}
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/*
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run-down of registers to be programmed:
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destination pitch
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source pitch
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BLT width/height
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source start
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destination start
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BLT mode
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BLT ROP
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VGA_GFX_SR_VALUE / VGA_GFX_SR_ENABLE: "fill color"
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start/stop
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*/
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cirrusfb_WaitBLT(regbase);
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/* pitch: set to line_length */
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/* dest pitch low */
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vga_wgfx(regbase, CL_GR24, line_length & 0xff);
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@ -2694,7 +2656,51 @@ static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
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vga_wgfx(regbase, CL_GR32, 0x0d); /* BLT ROP */
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/* and finally: GO! */
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vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */
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vga_wgfx(regbase, CL_GR31, 0x82); /* BLT Start/status */
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}
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/*******************************************************************
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cirrusfb_BitBLT()
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perform accelerated "scrolling"
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********************************************************************/
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static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
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u_short curx, u_short cury,
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u_short destx, u_short desty,
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u_short width, u_short height,
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u_short line_length)
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{
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u_short nwidth = width - 1;
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u_short nheight = height - 1;
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u_long nsrc, ndest;
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u_char bltmode;
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bltmode = 0x00;
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/* if source adr < dest addr, do the Blt backwards */
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if (cury <= desty) {
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if (cury == desty) {
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/* if src and dest are on the same line, check x */
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if (curx < destx)
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bltmode |= 0x01;
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} else
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bltmode |= 0x01;
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}
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/* standard case: forward blitting */
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nsrc = (cury * line_length) + curx;
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ndest = (desty * line_length) + destx;
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if (bltmode) {
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/* this means start addresses are at the end,
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* counting backwards
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*/
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nsrc += nheight * line_length + nwidth;
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ndest += nheight * line_length + nwidth;
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}
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cirrusfb_WaitBLT(regbase);
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cirrusfb_set_blitter(regbase, nwidth, nheight,
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nsrc, ndest, bltmode, line_length);
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}
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/*******************************************************************
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@ -2705,75 +2711,33 @@ static void cirrusfb_BitBLT(u8 __iomem *regbase, int bits_per_pixel,
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static void cirrusfb_RectFill(u8 __iomem *regbase, int bits_per_pixel,
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u_short x, u_short y, u_short width, u_short height,
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u_char color, u_short line_length)
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u32 color, u_short line_length)
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{
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u_short nwidth, nheight;
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u_long ndest;
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u_long ndest = (y * line_length) + x;
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u_char op;
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nwidth = width - 1;
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nheight = height - 1;
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ndest = (y * line_length) + x;
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cirrusfb_WaitBLT(regbase);
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/* pitch: set to line_length */
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vga_wgfx(regbase, CL_GR24, line_length & 0xff); /* dest pitch low */
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vga_wgfx(regbase, CL_GR25, line_length >> 8); /* dest pitch hi */
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vga_wgfx(regbase, CL_GR26, line_length & 0xff); /* source pitch low */
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vga_wgfx(regbase, CL_GR27, line_length >> 8); /* source pitch hi */
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/* BLT width: actual number of pixels - 1 */
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vga_wgfx(regbase, CL_GR20, nwidth & 0xff); /* BLT width low */
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vga_wgfx(regbase, CL_GR21, nwidth >> 8); /* BLT width hi */
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/* BLT height: actual number of lines -1 */
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vga_wgfx(regbase, CL_GR22, nheight & 0xff); /* BLT height low */
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vga_wgfx(regbase, CL_GR23, nheight >> 8); /* BLT width hi */
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/* BLT destination */
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/* BLT dest low */
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vga_wgfx(regbase, CL_GR28, (u_char) (ndest & 0xff));
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/* BLT dest mid */
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vga_wgfx(regbase, CL_GR29, (u_char) (ndest >> 8));
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/* BLT dest hi */
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vga_wgfx(regbase, CL_GR2A, (u_char) (ndest >> 16));
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/* BLT source: set to 0 (is a dummy here anyway) */
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vga_wgfx(regbase, CL_GR2C, 0x00); /* BLT src low */
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vga_wgfx(regbase, CL_GR2D, 0x00); /* BLT src mid */
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vga_wgfx(regbase, CL_GR2E, 0x00); /* BLT src hi */
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/* This is a ColorExpand Blt, using the */
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/* same color for foreground and background */
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vga_wgfx(regbase, VGA_GFX_SR_VALUE, color); /* foreground color */
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vga_wgfx(regbase, VGA_GFX_SR_ENABLE, color); /* background color */
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op = 0xc0;
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if (bits_per_pixel == 16) {
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vga_wgfx(regbase, CL_GR10, color); /* foreground color */
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vga_wgfx(regbase, CL_GR11, color); /* background color */
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op = 0x50;
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if (bits_per_pixel >= 16) {
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vga_wgfx(regbase, CL_GR10, color >> 8); /* foreground color */
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vga_wgfx(regbase, CL_GR11, color >> 8); /* background color */
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op = 0xd0;
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} else if (bits_per_pixel == 32) {
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vga_wgfx(regbase, CL_GR10, color); /* foreground color */
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vga_wgfx(regbase, CL_GR11, color); /* background color */
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vga_wgfx(regbase, CL_GR12, color); /* foreground color */
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vga_wgfx(regbase, CL_GR13, color); /* background color */
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vga_wgfx(regbase, CL_GR14, 0); /* foreground color */
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vga_wgfx(regbase, CL_GR15, 0); /* background color */
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op = 0x50;
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}
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if (bits_per_pixel == 32) {
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vga_wgfx(regbase, CL_GR12, color >> 16);/* foreground color */
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vga_wgfx(regbase, CL_GR13, color >> 16);/* background color */
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vga_wgfx(regbase, CL_GR14, color >> 24);/* foreground color */
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vga_wgfx(regbase, CL_GR15, color >> 24);/* background color */
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op = 0xf0;
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}
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/* BLT mode: color expand, Enable 8x8 copy (faster?) */
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vga_wgfx(regbase, CL_GR30, op); /* BLT mode */
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/* BLT ROP: SrcCopy */
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vga_wgfx(regbase, CL_GR32, 0x0d); /* BLT ROP */
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/* and finally: GO! */
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vga_wgfx(regbase, CL_GR31, 0x02); /* BLT Start/status */
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cirrusfb_set_blitter(regbase, width - 1, height - 1,
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0, ndest, op, line_length);
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}
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/**************************************************************************
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