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ARM: tegra: remove clock-frequency properties from serial nodes
Currently, the serial nodes define both a clock-frequency and a clocks property. We should not provide both, since they might conflict. In practice, this also causes problems since the of_serial driver uses the clock-frequency property in preference to the clocks property, and hence doesn't clk_prepare_enable() the clock, which may then leave it with no known users, and hence the common clock framework will disable it, thus breaking the port, which is usually the console. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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0203d91247
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2 changed files with 0 additions and 10 deletions
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@ -247,7 +247,6 @@ uarta: serial@70006000 {
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reg = <0x70006000 0x40>;
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reg-shift = <2>;
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interrupts = <0 36 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 8>;
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clocks = <&tegra_car 6>;
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status = "disabled";
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@ -258,7 +257,6 @@ uartb: serial@70006040 {
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reg = <0x70006040 0x40>;
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reg-shift = <2>;
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interrupts = <0 37 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 9>;
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clocks = <&tegra_car 96>;
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status = "disabled";
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@ -269,7 +267,6 @@ uartc: serial@70006200 {
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reg = <0x70006200 0x100>;
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reg-shift = <2>;
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interrupts = <0 46 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 10>;
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clocks = <&tegra_car 55>;
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status = "disabled";
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@ -280,7 +277,6 @@ uartd: serial@70006300 {
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reg = <0x70006300 0x100>;
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reg-shift = <2>;
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interrupts = <0 90 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 19>;
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clocks = <&tegra_car 65>;
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status = "disabled";
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@ -291,7 +287,6 @@ uarte: serial@70006400 {
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reg = <0x70006400 0x100>;
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reg-shift = <2>;
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interrupts = <0 91 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 20>;
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clocks = <&tegra_car 66>;
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status = "disabled";
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@ -234,7 +234,6 @@ uarta: serial@70006000 {
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reg = <0x70006000 0x40>;
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reg-shift = <2>;
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interrupts = <0 36 0x04>;
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clock-frequency = <408000000>;
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nvidia,dma-request-selector = <&apbdma 8>;
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clocks = <&tegra_car 6>;
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status = "disabled";
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@ -244,7 +243,6 @@ uartb: serial@70006040 {
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compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
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reg = <0x70006040 0x40>;
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reg-shift = <2>;
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clock-frequency = <408000000>;
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interrupts = <0 37 0x04>;
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nvidia,dma-request-selector = <&apbdma 9>;
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clocks = <&tegra_car 160>;
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@ -255,7 +253,6 @@ uartc: serial@70006200 {
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compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
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reg = <0x70006200 0x100>;
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reg-shift = <2>;
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clock-frequency = <408000000>;
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interrupts = <0 46 0x04>;
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nvidia,dma-request-selector = <&apbdma 10>;
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clocks = <&tegra_car 55>;
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@ -266,7 +263,6 @@ uartd: serial@70006300 {
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compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
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reg = <0x70006300 0x100>;
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reg-shift = <2>;
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clock-frequency = <408000000>;
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interrupts = <0 90 0x04>;
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nvidia,dma-request-selector = <&apbdma 19>;
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clocks = <&tegra_car 65>;
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@ -277,7 +273,6 @@ uarte: serial@70006400 {
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compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart";
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reg = <0x70006400 0x100>;
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reg-shift = <2>;
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clock-frequency = <408000000>;
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interrupts = <0 91 0x04>;
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nvidia,dma-request-selector = <&apbdma 20>;
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clocks = <&tegra_car 66>;
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