bpf, tests: Add tests for ALU operations implemented with function calls
32-bit JITs may implement complex ALU64 instructions using function calls. The new tests check aspects related to this, such as register clobbering and register argument re-ordering. Signed-off-by: Johan Almbladh <johan.almbladh@anyfinetworks.com> Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Link: https://lore.kernel.org/bpf/20210809091829.810076-9-johan.almbladh@anyfinetworks.com
This commit is contained in:
Johan Almbladh
Daniel Borkmann
parent
faa576253d
commit
84024a4e86
141
lib/test_bpf.c
141
lib/test_bpf.c
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@ -1916,6 +1916,147 @@ static struct bpf_test tests[] = {
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{ },
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{ { 0, -1 } }
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},
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{
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/*
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* Register (non-)clobbering test, in the case where a 32-bit
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* JIT implements complex ALU64 operations via function calls.
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* If so, the function call must be invisible in the eBPF
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* registers. The JIT must then save and restore relevant
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* registers during the call. The following tests check that
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* the eBPF registers retain their values after such a call.
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*/
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"INT: Register clobbering, R1 updated",
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.u.insns_int = {
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BPF_ALU32_IMM(BPF_MOV, R0, 0),
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BPF_ALU32_IMM(BPF_MOV, R1, 123456789),
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BPF_ALU32_IMM(BPF_MOV, R2, 2),
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BPF_ALU32_IMM(BPF_MOV, R3, 3),
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BPF_ALU32_IMM(BPF_MOV, R4, 4),
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BPF_ALU32_IMM(BPF_MOV, R5, 5),
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BPF_ALU32_IMM(BPF_MOV, R6, 6),
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BPF_ALU32_IMM(BPF_MOV, R7, 7),
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BPF_ALU32_IMM(BPF_MOV, R8, 8),
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BPF_ALU32_IMM(BPF_MOV, R9, 9),
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BPF_ALU64_IMM(BPF_DIV, R1, 123456789),
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BPF_JMP_IMM(BPF_JNE, R0, 0, 10),
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BPF_JMP_IMM(BPF_JNE, R1, 1, 9),
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BPF_JMP_IMM(BPF_JNE, R2, 2, 8),
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BPF_JMP_IMM(BPF_JNE, R3, 3, 7),
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BPF_JMP_IMM(BPF_JNE, R4, 4, 6),
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BPF_JMP_IMM(BPF_JNE, R5, 5, 5),
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BPF_JMP_IMM(BPF_JNE, R6, 6, 4),
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BPF_JMP_IMM(BPF_JNE, R7, 7, 3),
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BPF_JMP_IMM(BPF_JNE, R8, 8, 2),
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BPF_JMP_IMM(BPF_JNE, R9, 9, 1),
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BPF_ALU32_IMM(BPF_MOV, R0, 1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 1 } }
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},
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{
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"INT: Register clobbering, R2 updated",
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.u.insns_int = {
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BPF_ALU32_IMM(BPF_MOV, R0, 0),
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BPF_ALU32_IMM(BPF_MOV, R1, 1),
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BPF_ALU32_IMM(BPF_MOV, R2, 2 * 123456789),
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BPF_ALU32_IMM(BPF_MOV, R3, 3),
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BPF_ALU32_IMM(BPF_MOV, R4, 4),
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BPF_ALU32_IMM(BPF_MOV, R5, 5),
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BPF_ALU32_IMM(BPF_MOV, R6, 6),
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BPF_ALU32_IMM(BPF_MOV, R7, 7),
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BPF_ALU32_IMM(BPF_MOV, R8, 8),
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BPF_ALU32_IMM(BPF_MOV, R9, 9),
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BPF_ALU64_IMM(BPF_DIV, R2, 123456789),
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BPF_JMP_IMM(BPF_JNE, R0, 0, 10),
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BPF_JMP_IMM(BPF_JNE, R1, 1, 9),
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BPF_JMP_IMM(BPF_JNE, R2, 2, 8),
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BPF_JMP_IMM(BPF_JNE, R3, 3, 7),
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BPF_JMP_IMM(BPF_JNE, R4, 4, 6),
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BPF_JMP_IMM(BPF_JNE, R5, 5, 5),
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BPF_JMP_IMM(BPF_JNE, R6, 6, 4),
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BPF_JMP_IMM(BPF_JNE, R7, 7, 3),
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BPF_JMP_IMM(BPF_JNE, R8, 8, 2),
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BPF_JMP_IMM(BPF_JNE, R9, 9, 1),
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BPF_ALU32_IMM(BPF_MOV, R0, 1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 1 } }
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},
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{
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/*
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* Test 32-bit JITs that implement complex ALU64 operations as
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* function calls R0 = f(R1, R2), and must re-arrange operands.
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*/
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#define NUMER 0xfedcba9876543210ULL
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#define DENOM 0x0123456789abcdefULL
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"ALU64_DIV X: Operand register permutations",
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.u.insns_int = {
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/* R0 / R2 */
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BPF_LD_IMM64(R0, NUMER),
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BPF_LD_IMM64(R2, DENOM),
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BPF_ALU64_REG(BPF_DIV, R0, R2),
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BPF_JMP_IMM(BPF_JEQ, R0, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* R1 / R0 */
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BPF_LD_IMM64(R1, NUMER),
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BPF_LD_IMM64(R0, DENOM),
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BPF_ALU64_REG(BPF_DIV, R1, R0),
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BPF_JMP_IMM(BPF_JEQ, R1, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* R0 / R1 */
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BPF_LD_IMM64(R0, NUMER),
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BPF_LD_IMM64(R1, DENOM),
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BPF_ALU64_REG(BPF_DIV, R0, R1),
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BPF_JMP_IMM(BPF_JEQ, R0, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* R2 / R0 */
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BPF_LD_IMM64(R2, NUMER),
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BPF_LD_IMM64(R0, DENOM),
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BPF_ALU64_REG(BPF_DIV, R2, R0),
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BPF_JMP_IMM(BPF_JEQ, R2, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* R2 / R1 */
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BPF_LD_IMM64(R2, NUMER),
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BPF_LD_IMM64(R1, DENOM),
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BPF_ALU64_REG(BPF_DIV, R2, R1),
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BPF_JMP_IMM(BPF_JEQ, R2, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* R1 / R2 */
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BPF_LD_IMM64(R1, NUMER),
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BPF_LD_IMM64(R2, DENOM),
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BPF_ALU64_REG(BPF_DIV, R1, R2),
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BPF_JMP_IMM(BPF_JEQ, R1, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* R1 / R1 */
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BPF_LD_IMM64(R1, NUMER),
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BPF_ALU64_REG(BPF_DIV, R1, R1),
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BPF_JMP_IMM(BPF_JEQ, R1, 1, 1),
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BPF_EXIT_INSN(),
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/* R2 / R2 */
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BPF_LD_IMM64(R2, DENOM),
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BPF_ALU64_REG(BPF_DIV, R2, R2),
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BPF_JMP_IMM(BPF_JEQ, R2, 1, 1),
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BPF_EXIT_INSN(),
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/* R3 / R4 */
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BPF_LD_IMM64(R3, NUMER),
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BPF_LD_IMM64(R4, DENOM),
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BPF_ALU64_REG(BPF_DIV, R3, R4),
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BPF_JMP_IMM(BPF_JEQ, R3, NUMER / DENOM, 1),
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BPF_EXIT_INSN(),
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/* Successful return */
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BPF_LD_IMM64(R0, 1),
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BPF_EXIT_INSN(),
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},
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INTERNAL,
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{ },
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{ { 0, 1 } },
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#undef NUMER
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#undef DENOM
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},
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{
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"check: missing ret",
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.u.insns = {
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