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drm/amdgpu: reset wptr at cp compute resume (v2)
This patch is to resolve compute hang at resume time. v2: (agd5f) squash in second fix Signed-off-by: Sonny Jiang <sonny.jiang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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@ -3144,6 +3144,12 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev)
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WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL,
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mqd->cp_hqd_pq_doorbell_control);
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/* reset read and write pointers, similar to CP_RB0_WPTR/_RPTR */
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ring->wptr = 0;
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mqd->cp_hqd_pq_wptr = ring->wptr;
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WREG32(mmCP_HQD_PQ_WPTR, mqd->cp_hqd_pq_wptr);
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mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR);
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/* set the vmid for the queue */
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mqd->cp_hqd_vmid = 0;
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WREG32(mmCP_HQD_VMID, mqd->cp_hqd_vmid);
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