ASoC: cs35l56: Move part of cs35l56_init() to shared library

Part of the initialization code in cs35l56_init() can be re-used
by the HDA driver so move it into a new function in the shared
library.

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Acked-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230721132120.5523-8-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Richard Fitzgerald 2023-07-21 14:21:16 +01:00 committed by Mark Brown
parent 22e51dbb25
commit 84851aa055
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
3 changed files with 82 additions and 69 deletions

View file

@ -283,6 +283,7 @@ int cs35l56_is_fw_reload_needed(struct cs35l56_base *cs35l56_base);
int cs35l56_runtime_suspend_common(struct cs35l56_base *cs35l56_base);
int cs35l56_runtime_resume_common(struct cs35l56_base *cs35l56_base, bool is_soundwire);
void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_dsp);
int cs35l56_hw_init(struct cs35l56_base *cs35l56_base);
int cs35l56_get_bclk_freq_id(unsigned int freq);
void cs35l56_fill_supply_names(struct regulator_bulk_data *data);

View file

@ -544,6 +544,85 @@ void cs35l56_init_cs_dsp(struct cs35l56_base *cs35l56_base, struct cs_dsp *cs_ds
}
EXPORT_SYMBOL_NS_GPL(cs35l56_init_cs_dsp, SND_SOC_CS35L56_SHARED);
int cs35l56_hw_init(struct cs35l56_base *cs35l56_base)
{
int ret;
unsigned int devid, revid, otpid, secured;
/*
* If the system is not using a reset_gpio then issue a
* dummy read to force a wakeup.
*/
if (!cs35l56_base->reset_gpio)
regmap_read(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, &devid);
/* Wait for control port to be ready (datasheet tIRS). */
usleep_range(CS35L56_CONTROL_PORT_READY_US,
CS35L56_CONTROL_PORT_READY_US + 400);
/*
* The HALO_STATE register is in different locations on Ax and B0
* devices so the REVID needs to be determined before waiting for the
* firmware to boot.
*/
ret = regmap_read(cs35l56_base->regmap, CS35L56_REVID, &revid);
if (ret < 0) {
dev_err(cs35l56_base->dev, "Get Revision ID failed\n");
return ret;
}
cs35l56_base->rev = revid & (CS35L56_AREVID_MASK | CS35L56_MTLREVID_MASK);
ret = cs35l56_wait_for_firmware_boot(cs35l56_base);
if (ret)
return ret;
ret = regmap_read(cs35l56_base->regmap, CS35L56_DEVID, &devid);
if (ret < 0) {
dev_err(cs35l56_base->dev, "Get Device ID failed\n");
return ret;
}
devid &= CS35L56_DEVID_MASK;
switch (devid) {
case 0x35A56:
break;
default:
dev_err(cs35l56_base->dev, "Unknown device %x\n", devid);
return ret;
}
ret = regmap_read(cs35l56_base->regmap, CS35L56_DSP_RESTRICT_STS1, &secured);
if (ret) {
dev_err(cs35l56_base->dev, "Get Secure status failed\n");
return ret;
}
/* When any bus is restricted treat the device as secured */
if (secured & CS35L56_RESTRICTED_MASK)
cs35l56_base->secured = true;
ret = regmap_read(cs35l56_base->regmap, CS35L56_OTPID, &otpid);
if (ret < 0) {
dev_err(cs35l56_base->dev, "Get OTP ID failed\n");
return ret;
}
dev_info(cs35l56_base->dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d\n",
cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid);
/* Wake source and *_BLOCKED interrupts default to unmasked, so mask them */
regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
regmap_update_bits(cs35l56_base->regmap, CS35L56_IRQ1_MASK_1,
CS35L56_AMP_SHORT_ERR_EINT1_MASK,
0);
regmap_update_bits(cs35l56_base->regmap, CS35L56_IRQ1_MASK_8,
CS35L56_TEMP_ERR_EINT1_MASK,
0);
return 0;
}
EXPORT_SYMBOL_NS_GPL(cs35l56_hw_init, SND_SOC_CS35L56_SHARED);
static const u32 cs35l56_bclk_valid_for_pll_freq_table[] = {
[0x0C] = 128000,
[0x0F] = 256000,

View file

@ -1127,7 +1127,6 @@ EXPORT_SYMBOL_NS_GPL(cs35l56_common_probe, SND_SOC_CS35L56_CORE);
int cs35l56_init(struct cs35l56_private *cs35l56)
{
int ret;
unsigned int devid, revid, otpid, secured;
/*
* Check whether the actions associated with soft reset or one time
@ -1144,66 +1143,9 @@ int cs35l56_init(struct cs35l56_private *cs35l56)
pm_runtime_set_active(cs35l56->base.dev);
pm_runtime_enable(cs35l56->base.dev);
/*
* If the system is not using a reset_gpio then issue a
* dummy read to force a wakeup.
*/
if (!cs35l56->base.reset_gpio)
regmap_read(cs35l56->base.regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, &devid);
/* Wait for control port to be ready (datasheet tIRS). */
usleep_range(CS35L56_CONTROL_PORT_READY_US,
CS35L56_CONTROL_PORT_READY_US + 400);
/*
* The HALO_STATE register is in different locations on Ax and B0
* devices so the REVID needs to be determined before waiting for the
* firmware to boot.
*/
ret = regmap_read(cs35l56->base.regmap, CS35L56_REVID, &revid);
if (ret < 0) {
dev_err(cs35l56->base.dev, "Get Revision ID failed\n");
ret = cs35l56_hw_init(&cs35l56->base);
if (ret < 0)
return ret;
}
cs35l56->base.rev = revid & (CS35L56_AREVID_MASK | CS35L56_MTLREVID_MASK);
ret = cs35l56_wait_for_firmware_boot(&cs35l56->base);
if (ret)
return ret;
ret = regmap_read(cs35l56->base.regmap, CS35L56_DEVID, &devid);
if (ret < 0) {
dev_err(cs35l56->base.dev, "Get Device ID failed\n");
return ret;
}
devid &= CS35L56_DEVID_MASK;
switch (devid) {
case 0x35A56:
break;
default:
dev_err(cs35l56->base.dev, "Unknown device %x\n", devid);
return ret;
}
ret = regmap_read(cs35l56->base.regmap, CS35L56_DSP_RESTRICT_STS1, &secured);
if (ret) {
dev_err(cs35l56->base.dev, "Get Secure status failed\n");
return ret;
}
/* When any bus is restricted treat the device as secured */
if (secured & CS35L56_RESTRICTED_MASK)
cs35l56->base.secured = true;
ret = regmap_read(cs35l56->base.regmap, CS35L56_OTPID, &otpid);
if (ret < 0) {
dev_err(cs35l56->base.dev, "Get OTP ID failed\n");
return ret;
}
dev_info(cs35l56->base.dev, "Cirrus Logic CS35L56%s Rev %02X OTP%d\n",
cs35l56->base.secured ? "s" : "", cs35l56->base.rev, otpid);
/* Populate the DSP information with the revision and security state */
cs35l56->dsp.part = devm_kasprintf(cs35l56->base.dev, GFP_KERNEL, "cs35l56%s-%02x",
@ -1211,15 +1153,6 @@ int cs35l56_init(struct cs35l56_private *cs35l56)
if (!cs35l56->dsp.part)
return -ENOMEM;
/* Wake source and *_BLOCKED interrupts default to unmasked, so mask them */
regmap_write(cs35l56->base.regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
regmap_update_bits(cs35l56->base.regmap, CS35L56_IRQ1_MASK_1,
CS35L56_AMP_SHORT_ERR_EINT1_MASK,
0);
regmap_update_bits(cs35l56->base.regmap, CS35L56_IRQ1_MASK_8,
CS35L56_TEMP_ERR_EINT1_MASK,
0);
if (!cs35l56->base.reset_gpio) {
dev_dbg(cs35l56->base.dev, "No reset gpio: using soft reset\n");
cs35l56->soft_resetting = true;