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powerpc/603: don't handle PAGE_ACCESSED in TLB miss handlers.
PAGE_ACCESSED is only needed for CONFIG_SWAP. When CONFIG_SWAP is not set, just ignore it. If CONFIG_SWAP is set and PAGE_ACCESSED is not, let's take a minor fault. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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parent
451b3ec082
commit
84de6ab0e9
1 changed files with 13 additions and 11 deletions
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@ -503,7 +503,11 @@ InstructionTLBMiss:
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cmplw 0,r1,r3
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#endif
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mfspr r2, SPRN_SPRG_PGDIR
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#ifdef CONFIG_SWAP
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li r1,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
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#else
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li r1,_PAGE_PRESENT | _PAGE_EXEC
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#endif
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#if defined(CONFIG_MODULES) || defined(CONFIG_DEBUG_PAGEALLOC)
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bge- 112f
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lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
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@ -517,12 +521,6 @@ InstructionTLBMiss:
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lwz r0,0(r2) /* get linux-style pte */
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andc. r1,r1,r0 /* check access & ~permission */
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bne- InstructionAddressInvalid /* return if access not permitted */
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ori r0,r0,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */
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/*
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* NOTE! We are assuming this is not an SMP system, otherwise
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* we would need to update the pte atomically with lwarx/stwcx.
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*/
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stw r0,0(r2) /* update PTE (accessed bit) */
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/* Convert linux-style PTE to low word of PPC-style PTE */
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rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */
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ori r1, r1, 0xe05 /* clear out reserved bits */
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@ -571,7 +569,11 @@ DataLoadTLBMiss:
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lis r1,PAGE_OFFSET@h /* check if kernel address */
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cmplw 0,r1,r3
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mfspr r2, SPRN_SPRG_PGDIR
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#ifdef CONFIG_SWAP
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li r1, _PAGE_PRESENT | _PAGE_ACCESSED
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#else
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li r1, _PAGE_PRESENT
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#endif
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bge- 112f
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lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
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addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
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@ -583,12 +585,10 @@ DataLoadTLBMiss:
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lwz r0,0(r2) /* get linux-style pte */
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andc. r1,r1,r0 /* check access & ~permission */
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bne- DataAddressInvalid /* return if access not permitted */
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ori r0,r0,_PAGE_ACCESSED /* set _PAGE_ACCESSED in pte */
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/*
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* NOTE! We are assuming this is not an SMP system, otherwise
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* we would need to update the pte atomically with lwarx/stwcx.
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*/
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stw r0,0(r2) /* update PTE (accessed bit) */
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/* Convert linux-style PTE to low word of PPC-style PTE */
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rlwinm r1,r0,32-10,31,31 /* _PAGE_RW -> PP lsb */
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rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */
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@ -649,7 +649,11 @@ DataStoreTLBMiss:
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lis r1,PAGE_OFFSET@h /* check if kernel address */
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cmplw 0,r1,r3
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mfspr r2, SPRN_SPRG_PGDIR
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li r1, _PAGE_RW | _PAGE_PRESENT /* access flags */
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#ifdef CONFIG_SWAP
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li r1, _PAGE_RW | _PAGE_PRESENT | _PAGE_ACCESSED
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#else
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li r1, _PAGE_RW | _PAGE_PRESENT
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#endif
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bge- 112f
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lis r2, (swapper_pg_dir - PAGE_OFFSET)@ha /* if kernel address, use */
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addi r2, r2, (swapper_pg_dir - PAGE_OFFSET)@l /* kernel page table */
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@ -661,12 +665,10 @@ DataStoreTLBMiss:
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lwz r0,0(r2) /* get linux-style pte */
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andc. r1,r1,r0 /* check access & ~permission */
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bne- DataAddressInvalid /* return if access not permitted */
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ori r0,r0,_PAGE_ACCESSED
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/*
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* NOTE! We are assuming this is not an SMP system, otherwise
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* we would need to update the pte atomically with lwarx/stwcx.
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*/
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stw r0,0(r2) /* update PTE (accessed/dirty bits) */
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/* Convert linux-style PTE to low word of PPC-style PTE */
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rlwimi r0,r0,32-1,30,30 /* _PAGE_USER -> PP msb */
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li r1,0xe05 /* clear out reserved bits & PP lsb */
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