ARM: dts: silk: add DU DT support

Define  the SILK board dependent part of the DU device node.
Add the device nodes for the Analog Devices ADV7511W HDMI transmitter
(connected to DU0) and ADV7123  video DAC (connected to DU1). Add the
necessary subnodes to interconnect DU, HDMI/VDAC devices, and HDMI/VGA
connectors.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Sergei Shtylyov 2016-01-13 02:06:08 +03:00 committed by Simon Horman
parent 386a929113
commit 84e734f497

View file

@ -64,6 +64,61 @@ vccq_sdhi1: regulator@4 {
states = <3300000 1
1800000 0>;
};
vga-encoder {
compatible = "adi,adv7123";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7123_in: endpoint {
remote-endpoint = <&du_out_rgb1>;
};
};
port@1 {
reg = <1>;
adv7123_out: endpoint {
remote-endpoint = <&vga_in>;
};
};
};
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con: endpoint {
remote-endpoint = <&adv7511_out>;
};
};
};
vga {
compatible = "vga-connector";
port {
vga_in: endpoint {
remote-endpoint = <&adv7123_out>;
};
};
};
x2_clk: x2-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
x3_clk: x3-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <74250000>;
};
};
&extal_clk {
@ -164,6 +219,38 @@ adv7180: endpoint {
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio5>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb0>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
&mmcif0 {
@ -258,3 +345,25 @@ &pci1 {
&usbphy {
status = "okay";
};
&du {
status = "okay";
clocks = <&mstp7_clks R8A7794_CLK_DU0>,
<&mstp7_clks R8A7794_CLK_DU0>,
<&x2_clk>, <&x3_clk>;
clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
ports {
port@0 {
endpoint {
remote-endpoint = <&adv7511_in>;
};
};
port@1 {
endpoint {
remote-endpoint = <&adv7123_in>;
};
};
};
};