dt-bindings: drop redundant part of title (end, part three)
The Devicetree bindings document does not have to say in the title that
it is a "binding", but instead just describe the hardware.
Drop trailing "bindings" in various forms (also with trailing full
stop):
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \;
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media
Acked-by: Sebastian Reichel <sre@kernel.org> # power
Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq
Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Krzysztof Kozlowski
Rob Herring
parent
9fa3ad1a1a
commit
84e85359f4
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/arm/cci-control-port.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: CCI Interconnect Bus Masters binding
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title: CCI Interconnect Bus Masters
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maintainers:
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- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/arm/cpus.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM CPUs bindings
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title: ARM CPUs
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maintainers:
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- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/arm/keystone/ti,k3-sci-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Common K3 TI-SCI bindings
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title: Common K3 TI-SCI
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maintainers:
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- Nishanth Menon <nm@ti.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/arm/sp810.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Versatile Express SP810 System Controller bindings
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title: ARM Versatile Express SP810 System Controller
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maintainers:
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- Andre Przywara <andre.przywara@arm.com>
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@ -4,7 +4,7 @@
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$id: "http://devicetree.org/schemas/arm/stm32/st,mlahb.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: STMicroelectronics STM32 ML-AHB interconnect bindings
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title: STMicroelectronics STM32 ML-AHB interconnect
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maintainers:
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- Fabien Dessenne <fabien.dessenne@foss.st.com>
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@ -4,7 +4,7 @@
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$id: "http://devicetree.org/schemas/arm/stm32/st,stm32-syscon.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: STMicroelectronics STM32 Platforms System Controller bindings
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title: STMicroelectronics STM32 Platforms System Controller
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maintainers:
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- Alexandre Torgue <alexandre.torgue@foss.st.com>
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@ -4,7 +4,7 @@
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$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra194-cbb.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: NVIDIA Tegra194 CBB 1.0 bindings
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title: NVIDIA Tegra194 CBB 1.0
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maintainers:
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- Sumit Gupta <sumitg@nvidia.com>
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@ -4,7 +4,7 @@
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$id: "http://devicetree.org/schemas/arm/tegra/nvidia,tegra234-cbb.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: NVIDIA Tegra CBB 2.0 bindings
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title: NVIDIA Tegra CBB 2.0
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maintainers:
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- Sumit Gupta <sumitg@nvidia.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Versatile Express configuration bus bindings
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title: ARM Versatile Express configuration bus
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maintainers:
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- Andre Przywara <andre.przywara@arm.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM Versatile Express system registers bindings
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title: ARM Versatile Express system registers
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maintainers:
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- Andre Przywara <andre.przywara@arm.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/ata/allwinner,sun4i-a10-ahci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 AHCI SATA Controller bindings
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title: Allwinner A10 AHCI SATA Controller
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/ata/allwinner,sun8i-r40-ahci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner R40 AHCI SATA Controller bindings
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title: Allwinner R40 AHCI SATA Controller
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Texas Instruments interconnect target module binding
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title: Texas Instruments interconnect target module
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maintainers:
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- Tony Lindgren <tony@atomide.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/fsl,plldig.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock Binding
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title: NXP QorIQ Layerscape LS1028A Display PIXEL Clock
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maintainers:
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- Wen He <wen.he_1@nxp.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale SAI bitclock-as-a-clock binding
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title: Freescale SAI bitclock-as-a-clock
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maintainers:
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- Michael Walle <michael@walle.cc>
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$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8M Family Clock Control Module Binding
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title: NXP i.MX8M Family Clock Control Module
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maintainers:
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- Anson Huang <Anson.Huang@nxp.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
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title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
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maintainers:
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- Aisheng Dong <aisheng.dong@nxp.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/imx8ulp-cgc-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8ULP Clock Generation & Control(CGC) Module Binding
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title: NXP i.MX8ULP Clock Generation & Control(CGC) Module
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maintainers:
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- Jacky Bai <ping.bai@nxp.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/imx8ulp-pcc-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module Binding
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title: NXP i.MX8ULP Peripheral Clock Controller(PCC) Module
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maintainers:
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- Jacky Bai <ping.bai@nxp.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/imx93-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX93 Clock Control Module Binding
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title: NXP i.MX93 Clock Control Module
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maintainers:
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- Peng Fan <peng.fan@nxp.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/intel,agilex.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel SoCFPGA Agilex platform clock controller binding
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title: Intel SoCFPGA Agilex platform clock controller
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maintainers:
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- Dinh Nguyen <dinguyen@kernel.org>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/intel,cgu-lgm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel Lightning Mountain SoC's Clock Controller(CGU) Binding
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title: Intel Lightning Mountain SoC's Clock Controller(CGU)
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maintainers:
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- Rahul Tanwar <rahul.tanwar@linux.intel.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/intel,easic-n5x.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel SoCFPGA eASIC N5X platform clock controller binding
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title: Intel SoCFPGA eASIC N5X platform clock controller
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maintainers:
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- Dinh Nguyen <dinguyen@kernel.org>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/intel,stratix10.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Intel SoCFPGA Stratix10 platform clock controller binding
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title: Intel SoCFPGA Stratix10 platform clock controller
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maintainers:
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- Dinh Nguyen <dinguyen@kernel.org>
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$id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip PolarFire Clock Control Module Binding
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title: Microchip PolarFire Clock Control Module
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maintainers:
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- Daire McNamara <daire.mcnamara@microchip.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/milbeaut-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Milbeaut SoCs Clock Controller Binding
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title: Milbeaut SoCs Clock Controller
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maintainers:
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- Taichi Sugaya <sugaya.taichi@socionext.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/nuvoton,npcm845-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Nuvoton NPCM8XX Clock Controller Binding
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title: Nuvoton NPCM8XX Clock Controller
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maintainers:
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- Tomer Maimon <tmaimon77@gmail.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/clock/qcom,rpmhcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. RPMh Clocks Bindings
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title: Qualcomm Technologies, Inc. RPMh Clocks
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maintainers:
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- Taniya Das <tdas@codeaurora.org>
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$id: http://devicetree.org/schemas/clock/rockchip,rk3568-cru.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ROCKCHIP rk3568 Family Clock Control Module Binding
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title: ROCKCHIP rk3568 Family Clock Control Module
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maintainers:
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- Elaine Zhang <zhangqing@rock-chips.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/cpufreq/cpufreq-mediatek-hw.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek's CPUFREQ Bindings
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title: MediaTek's CPUFREQ
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maintainers:
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- Hector Yuan <hector.yuan@mediatek.com>
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$id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. NVMEM CPUFreq bindings
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title: Qualcomm Technologies, Inc. NVMEM CPUFreq
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maintainers:
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- Ilia Lin <ilia.lin@kernel.org>
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$id: http://devicetree.org/schemas/crypto/st,stm32-crc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 CRC bindings
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title: STMicroelectronics STM32 CRC
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maintainers:
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- Lionel Debieve <lionel.debieve@foss.st.com>
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$id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 CRYP bindings
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title: STMicroelectronics STM32 CRYP
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description: The STM32 CRYP block is built on the CRYP block found in
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the STn8820 SoC introduced in 2007, and subsequently used in the U8500
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$id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 HASH bindings
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title: STMicroelectronics STM32 HASH
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maintainers:
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- Lionel Debieve <lionel.debieve@foss.st.com>
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$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arm HDLCD display controller binding
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title: Arm HDLCD display controller
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maintainers:
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- Liviu Dudau <Liviu.Dudau@arm.com>
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$id: http://devicetree.org/schemas/display/arm,malidp.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arm Mali Display Processor (Mali-DP) binding
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title: Arm Mali Display Processor (Mali-DP)
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maintainers:
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- Liviu Dudau <Liviu.Dudau@arm.com>
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$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358767.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba TC358767 eDP bridge bindings
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title: Toshiba TC358767 eDP bridge
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maintainers:
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- Andrey Gusakov <andrey.gusakov@cogentembedded.com>
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@ -4,7 +4,7 @@
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$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba TC358775 DSI to LVDS bridge bindings
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title: Toshiba TC358775 DSI to LVDS bridge
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maintainers:
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- Vinay Simha BN <simhavcs@gmail.com>
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$id: http://devicetree.org/schemas/display/panel/display-timings.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: display timings bindings
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||||
title: display timings
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: panel timing bindings
|
||||
title: panel timing
|
||||
|
||||
maintainers:
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/dma/st,stm32-dma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 DMA Controller bindings
|
||||
title: STMicroelectronics STM32 DMA Controller
|
||||
|
||||
description: |
|
||||
The STM32 DMA is a general-purpose direct memory access controller capable of
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
|
||||
title: STMicroelectronics STM32 DMA MUX (DMA request router)
|
||||
|
||||
maintainers:
|
||||
- Amelie Delaunay <amelie.delaunay@foss.st.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 MDMA Controller bindings
|
||||
title: STMicroelectronics STM32 MDMA Controller
|
||||
|
||||
description: |
|
||||
The STM32 MDMA is a general-purpose direct memory access controller capable of
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/edac/dmc-520.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ARM DMC-520 EDAC bindings
|
||||
title: ARM DMC-520 EDAC
|
||||
|
||||
maintainers:
|
||||
- Lei Wang <lewan@microsoft.com>
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
$id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: System Control and Management Interface (SCMI) Message Protocol bindings
|
||||
title: System Control and Management Interface (SCMI) Message Protocol
|
||||
|
||||
maintainers:
|
||||
- Sudeep Holla <sudeep.holla@arm.com>
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
$id: http://devicetree.org/schemas/firmware/arm,scpi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: System Control and Power Interface (SCPI) Message Protocol bindings
|
||||
title: System Control and Power Interface (SCPI) Message Protocol
|
||||
|
||||
maintainers:
|
||||
- Sudeep Holla <sudeep.holla@arm.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/firmware/qemu,fw-cfg-mmio.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: QEMU Firmware Configuration bindings
|
||||
title: QEMU Firmware Configuration
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/gpio/gpio-tpic2810.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TPIC2810 GPIO controller bindings
|
||||
title: TPIC2810 GPIO controller
|
||||
|
||||
maintainers:
|
||||
- Aswath Govindraju <a-govindraju@ti.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: OMAP GPIO controller bindings
|
||||
title: OMAP GPIO controller
|
||||
|
||||
maintainers:
|
||||
- Grygorii Strashko <grygorii.strashko@ti.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom V3D GPU Bindings
|
||||
title: Broadcom V3D GPU
|
||||
|
||||
maintainers:
|
||||
- Eric Anholt <eric@anholt.net>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/gpu/vivante,gc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Vivante GPU Bindings
|
||||
title: Vivante GPU
|
||||
|
||||
description: Vivante GPU core devices
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/hwlock/st,stm32-hwspinlock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 Hardware Spinlock bindings
|
||||
title: STMicroelectronics STM32 Hardware Spinlock
|
||||
|
||||
maintainers:
|
||||
- Fabien Dessenne <fabien.dessenne@foss.st.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/hwmon/moortec,mr75203.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Moortec Semiconductor MR75203 PVT Controller bindings
|
||||
title: Moortec Semiconductor MR75203 PVT Controller
|
||||
|
||||
maintainers:
|
||||
- Rahul Tanwar <rtanwar@maxlinear.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell MMP I2C controller bindings
|
||||
title: Marvell MMP I2C controller
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh+dt@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/i2c/st,nomadik-i2c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ST Microelectronics Nomadik I2C Bindings
|
||||
title: ST Microelectronics Nomadik I2C
|
||||
|
||||
description: The Nomadik I2C host controller began its life in the ST
|
||||
Microelectronics STn8800 SoC, and was then inherited into STn8810 and
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/i3c/i3c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: I3C bus binding
|
||||
title: I3C bus
|
||||
|
||||
maintainers:
|
||||
- Alexandre Belloni <alexandre.belloni@bootlin.com>
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
$id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Ingenic JZ47xx ADC controller IIO bindings
|
||||
title: Ingenic JZ47xx ADC controller IIO
|
||||
|
||||
maintainers:
|
||||
- Artur Rojek <contact@artur-rojek.eu>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Motorola CPCAP PMIC ADC binding
|
||||
title: Motorola CPCAP PMIC ADC
|
||||
|
||||
maintainers:
|
||||
- Tony Lindgren <tony@atomide.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP IMX8QXP ADC bindings
|
||||
title: NXP IMX8QXP ADC
|
||||
|
||||
maintainers:
|
||||
- Cai Huoqing <caihuoqing@baidu.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP LPC1850 ADC bindings
|
||||
title: NXP LPC1850 ADC
|
||||
|
||||
maintainers:
|
||||
- Jonathan Cameron <jic23@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Spreadtrum SC27XX series PMICs ADC binding
|
||||
title: Spreadtrum SC27XX series PMICs ADC
|
||||
|
||||
maintainers:
|
||||
- Baolin Wang <baolin.wang7@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: STMicroelectronics STM32 ADC bindings
|
||||
title: STMicroelectronics STM32 ADC
|
||||
|
||||
description: |
|
||||
STM32 ADC is a successive approximation analog-to-digital converter.
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/adc/x-powers,axp209-adc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: X-Powers AXP ADC bindings
|
||||
title: X-Powers AXP ADC
|
||||
|
||||
maintainers:
|
||||
- Chen-Yu Tsai <wens@csie.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/dac/nxp,lpc1850-dac.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NXP LPC1850 DAC bindings
|
||||
title: NXP LPC1850 DAC
|
||||
|
||||
maintainers:
|
||||
- Jonathan Cameron <jic23@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: "http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: STMicroelectronics STM32 DAC bindings
|
||||
title: STMicroelectronics STM32 DAC
|
||||
|
||||
description: |
|
||||
The STM32 DAC is a 12-bit voltage output digital-to-analog converter. The DAC
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/iio/multiplexer/io-channel-mux.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: I/O channel multiplexer bindings
|
||||
title: I/O channel multiplexer
|
||||
|
||||
maintainers:
|
||||
- Peter Rosin <peda@axentia.se>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/cypress,cy8ctma140.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cypress CY8CTMA140 series touchscreen controller bindings
|
||||
title: Cypress CY8CTMA140 series touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/cypress,cy8ctma340.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cypress CY8CTMA340 series touchscreen controller bindings
|
||||
title: Cypress CY8CTMA340 series touchscreen controller
|
||||
|
||||
description: The Cypress CY8CTMA340 series (also known as "CYTTSP" after
|
||||
the marketing name Cypress TrueTouch Standard Product) touchscreens can
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/edt-ft5x06.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: FocalTech EDT-FT5x06 Polytouch Bindings
|
||||
title: FocalTech EDT-FT5x06 Polytouch
|
||||
|
||||
description: |
|
||||
There are 5 variants of the chip for various touch panel sizes
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/goodix.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Goodix GT9xx series touchscreen controller Bindings
|
||||
title: Goodix GT9xx series touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Dmitry Torokhov <dmitry.torokhov@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/himax,hx83112b.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Himax hx83112b touchscreen controller bindings
|
||||
title: Himax hx83112b touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Job Noorman <job@noorman.info>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/hycon,hy46xx.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hycon HY46XX series touchscreen controller bindings
|
||||
title: Hycon HY46XX series touchscreen controller
|
||||
|
||||
description: |
|
||||
There are 6 variants of the chip for various touch panel sizes and cover lens material
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/imagis,ist3038c.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Imagis IST30XXC family touchscreen controller bindings
|
||||
title: Imagis IST30XXC family touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Markuss Broks <markuss.broks@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/melfas,mms114.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Melfas MMS114 family touchscreen controller bindings
|
||||
title: Melfas MMS114 family touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Linus Walleij <linus.walleij@linaro.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/mstar,msg2638.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MStar msg2638 touchscreen controller Bindings
|
||||
title: MStar msg2638 touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Vincent Knecht <vincent.knecht@mailoo.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/ti,tsc2005.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Texas Instruments TSC2004 and TSC2005 touchscreen controller bindings
|
||||
title: Texas Instruments TSC2004 and TSC2005 touchscreen controller
|
||||
|
||||
maintainers:
|
||||
- Marek Vasut <marex@denx.de>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/touchscreen.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Common touchscreen Bindings
|
||||
title: Common touchscreen
|
||||
|
||||
maintainers:
|
||||
- Dmitry Torokhov <dmitry.torokhov@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/input/touchscreen/zinitix,bt400.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Zinitix BT4xx and BT5xx series touchscreen controller bindings
|
||||
title: Zinitix BT4xx and BT5xx series touchscreen controller
|
||||
|
||||
description: The Zinitix BT4xx and BT5xx series of touchscreen controllers
|
||||
are Korea-produced touchscreens with embedded microcontrollers. The
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/interrupt-controller/mrvl,intc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell MMP/Orion Interrupt controller bindings
|
||||
title: Marvell MMP/Orion Interrupt controller
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/interrupt-controller/nuvoton,wpcm450-aic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Nuvoton WPCM450 Advanced Interrupt Controller bindings
|
||||
title: Nuvoton WPCM450 Advanced Interrupt Controller
|
||||
|
||||
maintainers:
|
||||
- Jonathan Neuschäfer <j.neuschaefer@gmx.net>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/ipmi/ipmi-ipmb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: IPMI IPMB device bindings
|
||||
title: IPMI IPMB device
|
||||
|
||||
description: IPMI IPMB device bindings
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/ipmi/ipmi-smic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: IPMI device bindings
|
||||
title: IPMI device
|
||||
|
||||
description: IPMI device bindings
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/leds/backlight/gpio-backlight.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: gpio-backlight bindings
|
||||
title: gpio-backlight
|
||||
|
||||
maintainers:
|
||||
- Lee Jones <lee@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/leds/backlight/led-backlight.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: led-backlight bindings
|
||||
title: led-backlight
|
||||
|
||||
maintainers:
|
||||
- Lee Jones <lee@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/leds/backlight/pwm-backlight.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: pwm-backlight bindings
|
||||
title: pwm-backlight
|
||||
|
||||
maintainers:
|
||||
- Lee Jones <lee@kernel.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Qualcomm APCS global block bindings
|
||||
title: Qualcomm APCS global block
|
||||
|
||||
description:
|
||||
This binding describes the APCS "global" block found in various Qualcomm
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: "http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: Spreadtrum mailbox controller bindings
|
||||
title: Spreadtrum mailbox controller
|
||||
|
||||
maintainers:
|
||||
- Orson Zhai <orsonzhai@gmail.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: "http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#"
|
||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||||
|
||||
title: STMicroelectronics STM32 IPC controller bindings
|
||||
title: STMicroelectronics STM32 IPC controller
|
||||
|
||||
description:
|
||||
The IPCC block provides a non blocking signaling mechanism to post and
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
$id: http://devicetree.org/schemas/media/marvell,mmp2-ccic.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell MMP2 camera host interface bindings
|
||||
title: Marvell MMP2 camera host interface
|
||||
|
||||
maintainers:
|
||||
- Lubomir Rintel <lkundrak@v3.sk>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/media/renesas,ceu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas Capture Engine Unit (CEU) Bindings
|
||||
title: Renesas Capture Engine Unit (CEU)
|
||||
|
||||
maintainers:
|
||||
- Jacopo Mondi <jacopo+renesas@jmondi.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/media/st,stm32-cec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 CEC bindings
|
||||
title: STMicroelectronics STM32 CEC
|
||||
|
||||
maintainers:
|
||||
- Yannick Fertre <yannick.fertre@foss.st.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding
|
||||
title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI)
|
||||
|
||||
maintainers:
|
||||
- Hugues Fruchet <hugues.fruchet@foss.st.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/media/st,stm32-dma2d.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D binding
|
||||
title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D
|
||||
|
||||
description:
|
||||
Chrom-ART Accelerator(DMA2D), graphical hardware accelerator
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/memory-controllers/calxeda-ddr-ctrlr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Calxeda DDR memory controller binding
|
||||
title: Calxeda DDR memory controller
|
||||
|
||||
description: |
|
||||
The Calxeda DDR memory controller is initialised and programmed by the
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics Flexible Memory Controller 2 (FMC2) Bindings
|
||||
title: STMicroelectronics Flexible Memory Controller 2 (FMC2)
|
||||
|
||||
description: |
|
||||
The FMC2 functional block makes the interface with: synchronous and
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/mfd/actions,atc260x.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Actions Semi ATC260x Power Management IC bindings
|
||||
title: Actions Semi ATC260x Power Management IC
|
||||
|
||||
maintainers:
|
||||
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/mfd/ene-kb3930.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ENE KB3930 Embedded Controller bindings
|
||||
title: ENE KB3930 Embedded Controller
|
||||
|
||||
description: |
|
||||
This binding describes the ENE KB3930 Embedded Controller attached to an
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/mfd/ene-kb930.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: ENE KB930 Embedded Controller bindings
|
||||
title: ENE KB930 Embedded Controller
|
||||
|
||||
description: |
|
||||
This binding describes the ENE KB930 Embedded Controller attached to an
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/mfd/fsl,imx8qxp-csr.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX8qm/qxp Control and Status Registers Module Bindings
|
||||
title: Freescale i.MX8qm/qxp Control and Status Registers Module
|
||||
|
||||
maintainers:
|
||||
- Liu Ying <victor.liu@nxp.com>
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
$id: http://devicetree.org/schemas/mfd/qcom,pm8008.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Qualcomm Technologies, Inc. PM8008 PMIC bindings
|
||||
title: Qualcomm Technologies, Inc. PM8008 PMIC
|
||||
|
||||
maintainers:
|
||||
- Guru Das Srinagesh <gurus@codeaurora.org>
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue