mfd: db8500: Update register definition for u8540 clock

PRCMU and ab8500 registers updated for u8540

Signed-off-by: Philippe Begnic <philippe.begnic@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Philippe Begnic 2013-05-27 14:41:30 +02:00 committed by Mike Turquette
parent 1237e598a9
commit 852bbba967
2 changed files with 13 additions and 2 deletions

View file

@ -278,8 +278,8 @@ struct ab8500_sysctrl_platform_data {
#define AB9540_SYSCLK12CONFCTRL_PLL26TO38ENA BIT(0)
#define AB9540_SYSCLK12CONFCTRL_SYSCLK12USBMUXSEL BIT(1)
#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL_MASK 0x0C
#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL_SHIFT 2
#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL0 BIT(2)
#define AB9540_SYSCLK12CONFCTRL_INT384MHZMUXSEL1 BIT(3)
#define AB9540_SYSCLK12CONFCTRL_SYSCLK12BUFMUX BIT(4)
#define AB9540_SYSCLK12CONFCTRL_SYSCLK12PLLMUX BIT(5)
#define AB9540_SYSCLK12CONFCTRL_SYSCLK2MUXVALID BIT(6)

View file

@ -134,6 +134,10 @@ enum prcmu_clock {
PRCMU_SIACLK,
PRCMU_SVACLK,
PRCMU_ACLK,
PRCMU_HVACLK, /* Ux540 only */
PRCMU_G1CLK, /* Ux540 only */
PRCMU_SDMMCHCLK,
PRCMU_CAMCLK,
PRCMU_NUM_REG_CLOCKS,
PRCMU_SYSCLK = PRCMU_NUM_REG_CLOCKS,
PRCMU_CDCLK,
@ -148,6 +152,13 @@ enum prcmu_clock {
PRCMU_DSI0ESCCLK,
PRCMU_DSI1ESCCLK,
PRCMU_DSI2ESCCLK,
/* LCD DSI PLL - Ux540 only */
PRCMU_PLLDSI_LCD,
PRCMU_DSI0CLK_LCD,
PRCMU_DSI1CLK_LCD,
PRCMU_DSI0ESCCLK_LCD,
PRCMU_DSI1ESCCLK_LCD,
PRCMU_DSI2ESCCLK_LCD,
};
/**