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tg3: Add SGMII phy support for 5719/5718 serdes
Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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parent
3310e248c8
commit
85730a631f
2 changed files with 51 additions and 7 deletions
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@ -5465,11 +5465,50 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
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static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
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{
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int current_link_up, err = 0;
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int current_link_up = 0, err = 0;
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u32 bmsr, bmcr;
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u16 current_speed;
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u8 current_duplex;
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u32 local_adv, remote_adv;
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u16 current_speed = SPEED_UNKNOWN;
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u8 current_duplex = DUPLEX_UNKNOWN;
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u32 local_adv, remote_adv, sgsr;
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if ((tg3_asic_rev(tp) == ASIC_REV_5719 ||
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tg3_asic_rev(tp) == ASIC_REV_5720) &&
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!tg3_readphy(tp, SERDES_TG3_1000X_STATUS, &sgsr) &&
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(sgsr & SERDES_TG3_SGMII_MODE)) {
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if (force_reset)
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tg3_phy_reset(tp);
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tp->mac_mode &= ~MAC_MODE_PORT_MODE_MASK;
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if (!(sgsr & SERDES_TG3_LINK_UP)) {
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tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
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} else {
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current_link_up = 1;
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if (sgsr & SERDES_TG3_SPEED_1000) {
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current_speed = SPEED_1000;
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tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
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} else if (sgsr & SERDES_TG3_SPEED_100) {
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current_speed = SPEED_100;
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tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
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} else {
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current_speed = SPEED_10;
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tp->mac_mode |= MAC_MODE_PORT_MODE_MII;
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}
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if (sgsr & SERDES_TG3_FULL_DUPLEX)
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current_duplex = DUPLEX_FULL;
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else
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current_duplex = DUPLEX_HALF;
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}
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tw32_f(MAC_MODE, tp->mac_mode);
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udelay(40);
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tg3_clear_mac_status(tp);
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goto fiber_setup_done;
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}
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tp->mac_mode |= MAC_MODE_PORT_MODE_GMII;
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tw32_f(MAC_MODE, tp->mac_mode);
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@ -5480,9 +5519,6 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
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if (force_reset)
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tg3_phy_reset(tp);
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current_link_up = 0;
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current_speed = SPEED_UNKNOWN;
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current_duplex = DUPLEX_UNKNOWN;
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tp->link_config.rmt_adv = 0;
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err |= tg3_readphy(tp, MII_BMSR, &bmsr);
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@ -5600,6 +5636,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
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}
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}
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fiber_setup_done:
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if (current_link_up == 1 && current_duplex == DUPLEX_FULL)
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tg3_setup_flow_control(tp, local_adv, remote_adv);
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@ -2371,6 +2371,13 @@
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#define MII_TG3_FET_SHDW_AUXSTAT2 0x1b
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#define MII_TG3_FET_SHDW_AUXSTAT2_APD 0x0020
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/* Serdes PHY Register Definitions */
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#define SERDES_TG3_1000X_STATUS 0x14
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#define SERDES_TG3_SGMII_MODE 0x0001
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#define SERDES_TG3_LINK_UP 0x0002
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#define SERDES_TG3_FULL_DUPLEX 0x0004
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#define SERDES_TG3_SPEED_100 0x0008
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#define SERDES_TG3_SPEED_1000 0x0010
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/* APE registers. Accessible through BAR1 */
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#define TG3_APE_GPIO_MSG 0x0008
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