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ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix
Cache ownership must be acquired by reading/writing data from the cache line to make cache operation have the desired effect on the SMP MPCore CPU. However, the ownership is never acquired in the v6_dma_inv_range function when cleaning the first line and flushing the last one, in case the address is not aligned to D_CACHE_LINE_SIZE boundary. Fix this by reading/writing data if needed, before performing cache operations. While at it, fix v6_dma_flush_range to prevent RWFO outside the buffer. Cc: stable@kernel.org Signed-off-by: Valentine Barshak <vbarshak@mvista.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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parent
593c252a73
commit
85b093bcc5
1 changed files with 20 additions and 8 deletions
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@ -203,6 +203,10 @@ ENTRY(v6_flush_kern_dcache_area)
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* - end - virtual end address of region
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*/
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v6_dma_inv_range:
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldrb r2, [r0] @ read for ownership
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strb r2, [r0] @ write for ownership
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#endif
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tst r0, #D_CACHE_LINE_SIZE - 1
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bic r0, r0, #D_CACHE_LINE_SIZE - 1
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#ifdef HARVARD_CACHE
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@ -211,6 +215,10 @@ v6_dma_inv_range:
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mcrne p15, 0, r0, c7, c11, 1 @ clean unified line
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#endif
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tst r1, #D_CACHE_LINE_SIZE - 1
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldrneb r2, [r1, #-1] @ read for ownership
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strneb r2, [r1, #-1] @ write for ownership
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#endif
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bic r1, r1, #D_CACHE_LINE_SIZE - 1
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#ifdef HARVARD_CACHE
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mcrne p15, 0, r1, c7, c14, 1 @ clean & invalidate D line
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@ -218,10 +226,6 @@ v6_dma_inv_range:
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mcrne p15, 0, r1, c7, c15, 1 @ clean & invalidate unified line
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#endif
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1:
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldr r2, [r0] @ read for ownership
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str r2, [r0] @ write for ownership
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#endif
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#ifdef HARVARD_CACHE
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mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
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#else
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@ -229,6 +233,10 @@ v6_dma_inv_range:
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#endif
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add r0, r0, #D_CACHE_LINE_SIZE
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cmp r0, r1
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldrlo r2, [r0] @ read for ownership
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strlo r2, [r0] @ write for ownership
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#endif
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blo 1b
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mov r0, #0
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mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
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@ -263,12 +271,12 @@ v6_dma_clean_range:
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* - end - virtual end address of region
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*/
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ENTRY(v6_dma_flush_range)
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldrb r2, [r0] @ read for ownership
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strb r2, [r0] @ write for ownership
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#endif
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bic r0, r0, #D_CACHE_LINE_SIZE - 1
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1:
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldr r2, [r0] @ read for ownership
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str r2, [r0] @ write for ownership
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#endif
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#ifdef HARVARD_CACHE
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mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line
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#else
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@ -276,6 +284,10 @@ ENTRY(v6_dma_flush_range)
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#endif
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add r0, r0, #D_CACHE_LINE_SIZE
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cmp r0, r1
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#ifdef CONFIG_DMA_CACHE_RWFO
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ldrlob r2, [r0] @ read for ownership
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strlob r2, [r0] @ write for ownership
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#endif
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blo 1b
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mov r0, #0
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mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
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