Merge branch 'master' into i2c/for-mergewindow
This commit is contained in:
Wolfram Sang
commit
85f17d677f
1
.mailmap
1
.mailmap
|
|
@ -315,6 +315,7 @@ Morten Welinder <welinder@troll.com>
|
|||
Mythri P K <mythripk@ti.com>
|
||||
Nadia Yvette Chambers <nyc@holomorphy.com> William Lee Irwin III <wli@holomorphy.com>
|
||||
Nathan Chancellor <nathan@kernel.org> <natechancellor@gmail.com>
|
||||
Neil Armstrong <neil.armstrong@linaro.org> <narmstrong@baylibre.com>
|
||||
Nguyen Anh Quynh <aquynh@gmail.com>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggen@suse.de>
|
||||
Nicholas Piggin <npiggin@gmail.com> <npiggin@kernel.dk>
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Firmware registers Interface
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Meson SoCs have a register bank with status and data shared with the
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: /schemas/sound/name-prefix.yaml#
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Display Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic Meson Display controller is composed of several components
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ title: Analogix ANX7814 SlimPort (Full-HD Transmitter)
|
|||
|
||||
maintainers:
|
||||
- Andrzej Hajda <andrzej.hajda@intel.com>
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Robert Foss <robert.foss@linaro.org>
|
||||
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ title: ITE it66121 HDMI bridge Device Tree Bindings
|
|||
|
||||
maintainers:
|
||||
- Phong LE <ple@baylibre.com>
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The IT66121 is a high-performance and low-power single channel HDMI
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Solomon Goldentek Display GKTW70SDAE4SE 7" WVGA LVDS Display Panel
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Thierry Reding <thierry.reding@gmail.com>
|
||||
|
||||
allOf:
|
||||
|
|
|
|||
|
|
@ -34,8 +34,8 @@ Example:
|
|||
Use specific request line passing from dma
|
||||
For example, MMC request line is 5
|
||||
|
||||
sdhci: sdhci@98e00000 {
|
||||
compatible = "moxa,moxart-sdhci";
|
||||
mmc: mmc@98e00000 {
|
||||
compatible = "moxa,moxart-mmc";
|
||||
reg = <0x98e00000 0x5C>;
|
||||
interrupts = <5 0>;
|
||||
clocks = <&clk_apb>;
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson I2C Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Beniamino Galvani <b.galvani@gmail.com>
|
||||
|
||||
allOf:
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Generic i.MX bus frequency device
|
||||
|
||||
maintainers:
|
||||
- Leonard Crestez <leonard.crestez@nxp.com>
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description: |
|
||||
The i.MX SoC family has multiple buses for which clock frequency (and
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ properties:
|
|||
Documentation/devicetree/bindings/arm/cpus.yaml).
|
||||
|
||||
required:
|
||||
- fiq-index
|
||||
- apple,fiq-index
|
||||
- cpus
|
||||
|
||||
required:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Message-Handling-Unit Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic GE2D Acceleration Unit
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Video Decoder
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Maxime Jourdan <mjourdan@baylibre.com>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson AO-CEC Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic Meson AO-CEC module is present is Amlogic SoCs and its purpose is
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: i.MX8M DDR Controller
|
||||
|
||||
maintainers:
|
||||
- Leonard Crestez <leonard.crestez@nxp.com>
|
||||
- Peng Fan <peng.fan@nxp.com>
|
||||
|
||||
description:
|
||||
The DDRC block is integrated in i.MX8M for interfacing with DDR based
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Khadas on-board Microcontroller Device Tree Bindings
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
Khadas embeds a microcontroller on their VIM and Edge boards adding some
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson DWMAC Ethernet controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
||||
# We need a select here so we don't match all nodes with 'snps,dwmac'
|
||||
|
|
|
|||
|
|
@ -40,6 +40,7 @@ properties:
|
|||
patternProperties:
|
||||
'^opp-?[0-9]+$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
opp-hz: true
|
||||
|
|
|
|||
|
|
@ -19,6 +19,7 @@ properties:
|
|||
patternProperties:
|
||||
'^opp-?[0-9]+$':
|
||||
type: object
|
||||
additionalProperties: false
|
||||
|
||||
properties:
|
||||
opp-level: true
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic AXG MIPI D-PHY
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic G12A USB2 PHY
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic G12A USB3 + PCIE Combo PHY
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,6 @@ title: Qualcomm Technologies, Inc. Low Power Audio SubSystem (LPASS)
|
|||
Low Power Island (LPI) TLMM block
|
||||
|
||||
maintainers:
|
||||
- Srinivasa Rao Mandadapu <srivasam@codeaurora.org>
|
||||
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm Technologies, Inc. SC7280 TLMM block
|
||||
|
||||
maintainers:
|
||||
- Rajendra Nayak <rnayak@codeaurora.org>
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description: |
|
||||
This binding describes the Top Level Mode Multiplexer block found in the
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Amlogic Meson Everything-Else Power Domains
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |+
|
||||
The Everything-Else Power Domains node should be the child of a syscon
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: Qualcomm RPM/RPMh Power domains
|
||||
|
||||
maintainers:
|
||||
- Rajendra Nayak <rnayak@codeaurora.org>
|
||||
- Bjorn Andersson <andersson@kernel.org>
|
||||
|
||||
description:
|
||||
For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SoC Reset Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson Random number generator
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SoC UART Serial Interface
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic Meson SoC UART Serial Interface is present on a large range
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Canvas Video Lookup Table
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
- Maxime Jourdan <mjourdan@baylibre.com>
|
||||
|
||||
description: |
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SPI Communication Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "spi-controller.yaml#"
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson SPI Flash Controller
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: "spi-controller.yaml#"
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Amlogic Meson G12A DWC3 USB SoC Controller Glue
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
description: |
|
||||
The Amlogic G12A embeds a DWC3 USB IP Core configured for USB2 and USB3
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ $schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|||
title: Meson GXBB SoCs Watchdog timer
|
||||
|
||||
maintainers:
|
||||
- Neil Armstrong <narmstrong@baylibre.com>
|
||||
- Neil Armstrong <neil.armstrong@linaro.org>
|
||||
|
||||
allOf:
|
||||
- $ref: watchdog.yaml#
|
||||
|
|
|
|||
|
|
@ -148,7 +148,7 @@ You can do plain I2C transactions by using read(2) and write(2) calls.
|
|||
You do not need to pass the address byte; instead, set it through
|
||||
ioctl I2C_SLAVE before you try to access the device.
|
||||
|
||||
You can do SMBus level transactions (see documentation file smbus-protocol
|
||||
You can do SMBus level transactions (see documentation file smbus-protocol.rst
|
||||
for details) through the following functions::
|
||||
|
||||
__s32 i2c_smbus_write_quick(int file, __u8 value);
|
||||
|
|
|
|||
|
|
@ -32,9 +32,9 @@ User manual
|
|||
===========
|
||||
|
||||
I2C slave backends behave like standard I2C clients. So, you can instantiate
|
||||
them as described in the document 'instantiating-devices'. The only difference
|
||||
is that i2c slave backends have their own address space. So, you have to add
|
||||
0x1000 to the address you would originally request. An example for
|
||||
them as described in the document instantiating-devices.rst. The only
|
||||
difference is that i2c slave backends have their own address space. So, you
|
||||
have to add 0x1000 to the address you would originally request. An example for
|
||||
instantiating the slave-eeprom driver from userspace at the 7 bit address 0x64
|
||||
on bus 1::
|
||||
|
||||
|
|
|
|||
|
|
@ -364,7 +364,7 @@ stop condition is issued between transaction. The i2c_msg structure
|
|||
contains for each message the client address, the number of bytes of the
|
||||
message and the message data itself.
|
||||
|
||||
You can read the file ``i2c-protocol`` for more information about the
|
||||
You can read the file i2c-protocol.rst for more information about the
|
||||
actual I2C protocol.
|
||||
|
||||
|
||||
|
|
@ -414,7 +414,7 @@ transactions return 0 on success; the 'read' transactions return the read
|
|||
value, except for block transactions, which return the number of values
|
||||
read. The block buffers need not be longer than 32 bytes.
|
||||
|
||||
You can read the file ``smbus-protocol`` for more information about the
|
||||
You can read the file smbus-protocol.rst for more information about the
|
||||
actual SMBus protocol.
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -47,7 +47,6 @@ allow_join_initial_addr_port - BOOLEAN
|
|||
Default: 1
|
||||
|
||||
pm_type - INTEGER
|
||||
|
||||
Set the default path manager type to use for each new MPTCP
|
||||
socket. In-kernel path management will control subflow
|
||||
connections and address advertisements according to
|
||||
|
|
|
|||
|
|
@ -70,15 +70,6 @@ nf_conntrack_generic_timeout - INTEGER (seconds)
|
|||
Default for generic timeout. This refers to layer 4 unknown/unsupported
|
||||
protocols.
|
||||
|
||||
nf_conntrack_helper - BOOLEAN
|
||||
- 0 - disabled (default)
|
||||
- not 0 - enabled
|
||||
|
||||
Enable automatic conntrack helper assignment.
|
||||
If disabled it is required to set up iptables rules to assign
|
||||
helpers to connections. See the CT target description in the
|
||||
iptables-extensions(8) man page for further information.
|
||||
|
||||
nf_conntrack_icmp_timeout - INTEGER (seconds)
|
||||
default 30
|
||||
|
||||
|
|
|
|||
37
MAINTAINERS
37
MAINTAINERS
|
|
@ -671,7 +671,8 @@ F: fs/afs/
|
|||
F: include/trace/events/afs.h
|
||||
|
||||
AGPGART DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: David Airlie <airlied@redhat.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm
|
||||
F: drivers/char/agp/
|
||||
|
|
@ -1010,7 +1011,6 @@ F: drivers/spi/spi-amd.c
|
|||
|
||||
AMD MP2 I2C DRIVER
|
||||
M: Elie Morisse <syniurge@gmail.com>
|
||||
M: Nehal Shah <nehal-bakulchandra.shah@amd.com>
|
||||
M: Shyam Sundar S K <shyam-sundar.s-k@amd.com>
|
||||
L: linux-i2c@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -1803,7 +1803,7 @@ N: sun[x456789]i
|
|||
N: sun50i
|
||||
|
||||
ARM/Amlogic Meson SoC CLOCK FRAMEWORK
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
M: Jerome Brunet <jbrunet@baylibre.com>
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Maintained
|
||||
|
|
@ -1828,7 +1828,7 @@ F: Documentation/devicetree/bindings/sound/amlogic*
|
|||
F: sound/soc/meson/
|
||||
|
||||
ARM/Amlogic Meson SoC support
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
M: Kevin Hilman <khilman@baylibre.com>
|
||||
R: Jerome Brunet <jbrunet@baylibre.com>
|
||||
R: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
|
||||
|
|
@ -2531,7 +2531,7 @@ W: http://www.digriz.org.uk/ts78xx/kernel
|
|||
F: arch/arm/mach-orion5x/ts78xx-*
|
||||
|
||||
ARM/OXNAS platform support
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-oxnas@groups.io (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
|
@ -5245,6 +5245,7 @@ F: block/blk-throttle.c
|
|||
F: include/linux/blk-cgroup.h
|
||||
|
||||
CONTROL GROUP - CPUSET
|
||||
M: Waiman Long <longman@redhat.com>
|
||||
M: Zefan Li <lizefan.x@bytedance.com>
|
||||
L: cgroups@vger.kernel.org
|
||||
S: Maintained
|
||||
|
|
@ -6753,7 +6754,7 @@ F: Documentation/devicetree/bindings/display/panel/samsung,lms380kf01.yaml
|
|||
F: drivers/gpu/drm/panel/panel-widechips-ws2401.c
|
||||
|
||||
DRM DRIVERS
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: David Airlie <airlied@gmail.com>
|
||||
M: Daniel Vetter <daniel@ffwll.ch>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
|
|
@ -6792,7 +6793,7 @@ F: Documentation/devicetree/bindings/display/allwinner*
|
|||
F: drivers/gpu/drm/sun4i/
|
||||
|
||||
DRM DRIVERS FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -6814,7 +6815,7 @@ F: drivers/gpu/drm/atmel-hlcdc/
|
|||
|
||||
DRM DRIVERS FOR BRIDGE CHIPS
|
||||
M: Andrzej Hajda <andrzej.hajda@intel.com>
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
M: Robert Foss <robert.foss@linaro.org>
|
||||
R: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
|
||||
R: Jonas Karlman <jonas@kwiboo.se>
|
||||
|
|
@ -8652,8 +8653,8 @@ F: drivers/input/touchscreen/goodix*
|
|||
|
||||
GOOGLE ETHERNET DRIVERS
|
||||
M: Jeroen de Borst <jeroendb@google.com>
|
||||
R: Catherine Sullivan <csully@google.com>
|
||||
R: David Awogbemila <awogbemila@google.com>
|
||||
M: Catherine Sullivan <csully@google.com>
|
||||
R: Shailend Chand <shailend@google.com>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/networking/device_drivers/ethernet/google/gve.rst
|
||||
|
|
@ -9122,7 +9123,7 @@ S: Maintained
|
|||
F: drivers/dma/hisi_dma.c
|
||||
|
||||
HISILICON GPIO DRIVER
|
||||
M: Luo Jiaxing <luojiaxing@huawei.com>
|
||||
M: Jay Fang <f.fangjian@huawei.com>
|
||||
L: linux-gpio@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/gpio/gpio-hisi.c
|
||||
|
|
@ -10828,7 +10829,7 @@ F: drivers/media/tuners/it913x*
|
|||
|
||||
ITE IT66121 HDMI BRIDGE DRIVER
|
||||
M: Phong LE <ple@baylibre.com>
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
S: Maintained
|
||||
T: git git://anongit.freedesktop.org/drm/drm-misc
|
||||
F: Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml
|
||||
|
|
@ -11347,7 +11348,7 @@ F: kernel/debug/
|
|||
F: kernel/module/kdb.c
|
||||
|
||||
KHADAS MCU MFD DRIVER
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/mfd/khadas,mcu.yaml
|
||||
|
|
@ -13218,7 +13219,7 @@ S: Maintained
|
|||
F: drivers/watchdog/menz69_wdt.c
|
||||
|
||||
MESON AO CEC DRIVER FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -13229,7 +13230,7 @@ F: drivers/media/cec/platform/meson/ao-cec-g12a.c
|
|||
F: drivers/media/cec/platform/meson/ao-cec.c
|
||||
|
||||
MESON GE2D DRIVER FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -13245,7 +13246,7 @@ F: Documentation/devicetree/bindings/mtd/amlogic,meson-nand.txt
|
|||
F: drivers/mtd/nand/raw/meson_*
|
||||
|
||||
MESON VIDEO DECODER DRIVER FOR AMLOGIC SOCS
|
||||
M: Neil Armstrong <narmstrong@baylibre.com>
|
||||
M: Neil Armstrong <neil.armstrong@linaro.org>
|
||||
L: linux-media@vger.kernel.org
|
||||
L: linux-amlogic@lists.infradead.org
|
||||
S: Supported
|
||||
|
|
@ -16857,6 +16858,7 @@ F: drivers/net/ethernet/qualcomm/emac/
|
|||
|
||||
QUALCOMM ETHQOS ETHERNET DRIVER
|
||||
M: Vinod Koul <vkoul@kernel.org>
|
||||
R: Bhupesh Sharma <bhupesh.sharma@linaro.org>
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/net/qcom,ethqos.txt
|
||||
|
|
@ -19959,6 +19961,7 @@ S: Supported
|
|||
F: drivers/net/team/
|
||||
F: include/linux/if_team.h
|
||||
F: include/uapi/linux/if_team.h
|
||||
F: tools/testing/selftests/net/team/
|
||||
|
||||
TECHNOLOGIC SYSTEMS TS-5500 PLATFORM SUPPORT
|
||||
M: "Savoir-faire Linux Inc." <kernel@savoirfairelinux.com>
|
||||
|
|
@ -21565,7 +21568,7 @@ F: drivers/gpio/gpio-virtio.c
|
|||
F: include/uapi/linux/virtio_gpio.h
|
||||
|
||||
VIRTIO GPU DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: David Airlie <airlied@redhat.com>
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
R: Gurchetan Singh <gurchetansingh@chromium.org>
|
||||
R: Chia-I Wu <olvaffe@gmail.com>
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -2,7 +2,7 @@
|
|||
VERSION = 6
|
||||
PATCHLEVEL = 0
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Hurr durr I'ma ninja sloth
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -541,13 +541,13 @@
|
|||
|
||||
phy0: ethernet-phy@1 {
|
||||
reg = <1>;
|
||||
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
phy1: ethernet-phy@2 {
|
||||
reg = <2>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -79,7 +79,7 @@
|
|||
clocks = <&ref12>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
&mmc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -93,8 +93,8 @@
|
|||
clock-names = "PCLK";
|
||||
};
|
||||
|
||||
sdhci: sdhci@98e00000 {
|
||||
compatible = "moxa,moxart-sdhci";
|
||||
mmc: mmc@98e00000 {
|
||||
compatible = "moxa,moxart-mmc";
|
||||
reg = <0x98e00000 0x5C>;
|
||||
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk_apb>;
|
||||
|
|
|
|||
|
|
@ -152,11 +152,11 @@
|
|||
* CPLD_reset is RESET_SOFT in schematic
|
||||
*/
|
||||
gpio-line-names =
|
||||
"CPLD_D[1]", "CPLD_int", "CPLD_reset", "",
|
||||
"", "CPLD_D[0]", "", "",
|
||||
"", "", "", "CPLD_D[2]",
|
||||
"CPLD_D[3]", "CPLD_D[4]", "CPLD_D[5]", "CPLD_D[6]",
|
||||
"CPLD_D[7]", "", "", "",
|
||||
"CPLD_D[6]", "CPLD_int", "CPLD_reset", "",
|
||||
"", "CPLD_D[7]", "", "",
|
||||
"", "", "", "CPLD_D[5]",
|
||||
"CPLD_D[4]", "CPLD_D[3]", "CPLD_D[2]", "CPLD_D[1]",
|
||||
"CPLD_D[0]", "", "", "",
|
||||
"", "", "", "",
|
||||
"", "", "", "KBD_intK",
|
||||
"", "", "", "";
|
||||
|
|
|
|||
|
|
@ -5,7 +5,6 @@
|
|||
|
||||
/dts-v1/;
|
||||
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
#include "imx8mm-tqma8mqml.dtsi"
|
||||
#include "mba8mx.dtsi"
|
||||
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright 2020-2021 TQ-Systems GmbH
|
||||
*/
|
||||
|
||||
#include <dt-bindings/phy/phy-imx8-pcie.h>
|
||||
#include "imx8mm.dtsi"
|
||||
|
||||
/ {
|
||||
|
|
|
|||
|
|
@ -367,8 +367,8 @@
|
|||
nxp,dvs-standby-voltage = <850000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-min-microvolt = <805000>;
|
||||
regulator-name = "On-module +VDD_ARM (BUCK2)";
|
||||
regulator-ramp-delay = <3125>;
|
||||
};
|
||||
|
|
@ -376,8 +376,8 @@
|
|||
reg_vdd_dram: BUCK3 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
regulator-min-microvolt = <805000>;
|
||||
regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";
|
||||
};
|
||||
|
||||
|
|
@ -416,7 +416,7 @@
|
|||
reg_vdd_snvs: LDO2 {
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
regulator-max-microvolt = <900000>;
|
||||
regulator-max-microvolt = <800000>;
|
||||
regulator-min-microvolt = <800000>;
|
||||
regulator-name = "On-module +V0.8_SNVS (LDO2)";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -672,7 +672,6 @@
|
|||
<&clk IMX8MN_CLK_GPU_SHADER>,
|
||||
<&clk IMX8MN_CLK_GPU_BUS_ROOT>,
|
||||
<&clk IMX8MN_CLK_GPU_AHB>;
|
||||
resets = <&src IMX8MQ_RESET_GPU_RESET>;
|
||||
};
|
||||
|
||||
pgc_dispmix: power-domain@3 {
|
||||
|
|
|
|||
|
|
@ -57,13 +57,13 @@
|
|||
switch-1 {
|
||||
label = "S12";
|
||||
linux,code = <BTN_0>;
|
||||
gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
switch-2 {
|
||||
label = "S13";
|
||||
linux,code = <BTN_1>;
|
||||
gpios = <&gpio5 27 GPIO_ACTIVE_LOW>;
|
||||
gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -394,6 +394,8 @@
|
|||
|
||||
&pcf85063 {
|
||||
/* RTC_EVENT# is connected on MBa8MPxL */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pcf85063>;
|
||||
interrupt-parent = <&gpio4>;
|
||||
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
|
||||
};
|
||||
|
|
@ -630,6 +632,10 @@
|
|||
fsl,pins = <MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10>; /* Power enable */
|
||||
};
|
||||
|
||||
pinctrl_pcf85063: pcf85063grp {
|
||||
fsl,pins = <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x80>;
|
||||
};
|
||||
|
||||
/* LVDS Backlight */
|
||||
pinctrl_pwm2: pwm2grp {
|
||||
fsl,pins = <MX8MP_IOMUXC_SAI5_RXD0__PWM2_OUT 0x14>;
|
||||
|
|
|
|||
|
|
@ -123,8 +123,7 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_reg_can>;
|
||||
regulator-name = "can2_stby";
|
||||
gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
|
|
@ -484,35 +483,40 @@
|
|||
lan1: port@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan2: port@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan3: port@2 {
|
||||
reg = <2>;
|
||||
label = "lan3";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan4: port@3 {
|
||||
reg = <3>;
|
||||
label = "lan4";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
lan5: port@4 {
|
||||
reg = <4>;
|
||||
label = "lan5";
|
||||
phy-mode = "internal";
|
||||
local-mac-address = [00 00 00 00 00 00];
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
port@5 {
|
||||
reg = <5>;
|
||||
label = "cpu";
|
||||
ethernet = <&fec>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
|
|
|||
|
|
@ -172,6 +172,7 @@
|
|||
compatible = "fsl,imx8ulp-pcc3";
|
||||
reg = <0x292d0000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
tpm5: tpm@29340000 {
|
||||
|
|
@ -270,6 +271,7 @@
|
|||
compatible = "fsl,imx8ulp-pcc4";
|
||||
reg = <0x29800000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
lpi2c6: i2c@29840000 {
|
||||
|
|
@ -414,6 +416,7 @@
|
|||
compatible = "fsl,imx8ulp-pcc5";
|
||||
reg = <0x2da70000 0x10000>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -2,8 +2,8 @@
|
|||
/*
|
||||
* Copyright (c) 2020 Fuzhou Rockchip Electronics Co., Ltd
|
||||
* Copyright (c) 2020 Engicam srl
|
||||
* Copyright (c) 2020 Amarula Solutons
|
||||
* Copyright (c) 2020 Amarula Solutons(India)
|
||||
* Copyright (c) 2020 Amarula Solutions
|
||||
* Copyright (c) 2020 Amarula Solutions(India)
|
||||
*/
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
|
|
|||
|
|
@ -88,3 +88,8 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&wlan_host_wake_l {
|
||||
/* Kevin has an external pull up, but Bob does not. */
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -244,6 +244,14 @@
|
|||
&edp {
|
||||
status = "okay";
|
||||
|
||||
/*
|
||||
* eDP PHY/clk don't sync reliably at anything other than 24 MHz. Only
|
||||
* set this here, because rk3399-gru.dtsi ensures we can generate this
|
||||
* off GPLL=600MHz, whereas some other RK3399 boards may not.
|
||||
*/
|
||||
assigned-clocks = <&cru PCLK_EDP>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
|
||||
ports {
|
||||
edp_out: port@1 {
|
||||
reg = <1>;
|
||||
|
|
@ -578,6 +586,7 @@ ap_i2c_tp: &i2c5 {
|
|||
};
|
||||
|
||||
wlan_host_wake_l: wlan-host-wake-l {
|
||||
/* Kevin has an external pull up, but Bob does not */
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -62,7 +62,6 @@
|
|||
vcc5v0_host: vcc5v0-host-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
|
||||
enable-active-low;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_host_en>;
|
||||
regulator-name = "vcc5v0_host";
|
||||
|
|
|
|||
|
|
@ -189,7 +189,6 @@
|
|||
|
||||
vcc3v3_sd: vcc3v3_sd {
|
||||
compatible = "regulator-fixed";
|
||||
enable-active-low;
|
||||
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc_sd_h>;
|
||||
|
|
|
|||
|
|
@ -506,7 +506,7 @@
|
|||
disable-wp;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
sd-uhs-sdr104;
|
||||
sd-uhs-sdr50;
|
||||
vmmc-supply = <&vcc3v3_sd>;
|
||||
vqmmc-supply = <&vccio_sd>;
|
||||
status = "okay";
|
||||
|
|
|
|||
|
|
@ -678,7 +678,7 @@
|
|||
};
|
||||
|
||||
&usb_host0_xhci {
|
||||
extcon = <&usb2phy0>;
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -656,7 +656,7 @@
|
|||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
vbus-supply = <&vcc5v0_usb_otg>;
|
||||
phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -581,7 +581,7 @@
|
|||
};
|
||||
|
||||
&usb2phy0_otg {
|
||||
vbus-supply = <&vcc5v0_usb_otg>;
|
||||
phy-supply = <&vcc5v0_usb_otg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -48,6 +48,7 @@ CONFIG_ARCH_KEEMBAY=y
|
|||
CONFIG_ARCH_MEDIATEK=y
|
||||
CONFIG_ARCH_MESON=y
|
||||
CONFIG_ARCH_MVEBU=y
|
||||
CONFIG_ARCH_NXP=y
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_NPCM=y
|
||||
CONFIG_ARCH_QCOM=y
|
||||
|
|
|
|||
|
|
@ -237,7 +237,7 @@ static void amu_fie_setup(const struct cpumask *cpus)
|
|||
for_each_cpu(cpu, cpus) {
|
||||
if (!freq_counters_valid(cpu) ||
|
||||
freq_inv_set_max_ratio(cpu,
|
||||
cpufreq_get_hw_max_freq(cpu) * 1000,
|
||||
cpufreq_get_hw_max_freq(cpu) * 1000ULL,
|
||||
arch_timer_get_rate()))
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2114,7 +2114,7 @@ static int finalize_hyp_mode(void)
|
|||
* at, which would end badly once inaccessible.
|
||||
*/
|
||||
kmemleak_free_part(__hyp_bss_start, __hyp_bss_end - __hyp_bss_start);
|
||||
kmemleak_free_part(__va(hyp_mem_base), hyp_mem_size);
|
||||
kmemleak_free_part_phys(hyp_mem_base, hyp_mem_size);
|
||||
return pkvm_drop_host_privileges();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -331,12 +331,6 @@ static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
|
|||
}
|
||||
BUG_ON(p4d_bad(p4d));
|
||||
|
||||
/*
|
||||
* No need for locking during early boot. And it doesn't work as
|
||||
* expected with KASLR enabled.
|
||||
*/
|
||||
if (system_state != SYSTEM_BOOTING)
|
||||
mutex_lock(&fixmap_lock);
|
||||
pudp = pud_set_fixmap_offset(p4dp, addr);
|
||||
do {
|
||||
pud_t old_pud = READ_ONCE(*pudp);
|
||||
|
|
@ -368,15 +362,13 @@ static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
|
|||
} while (pudp++, addr = next, addr != end);
|
||||
|
||||
pud_clear_fixmap();
|
||||
if (system_state != SYSTEM_BOOTING)
|
||||
mutex_unlock(&fixmap_lock);
|
||||
}
|
||||
|
||||
static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
|
||||
unsigned long virt, phys_addr_t size,
|
||||
pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int),
|
||||
int flags)
|
||||
static void __create_pgd_mapping_locked(pgd_t *pgdir, phys_addr_t phys,
|
||||
unsigned long virt, phys_addr_t size,
|
||||
pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int),
|
||||
int flags)
|
||||
{
|
||||
unsigned long addr, end, next;
|
||||
pgd_t *pgdp = pgd_offset_pgd(pgdir, virt);
|
||||
|
|
@ -400,8 +392,20 @@ static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
|
|||
} while (pgdp++, addr = next, addr != end);
|
||||
}
|
||||
|
||||
static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
|
||||
unsigned long virt, phys_addr_t size,
|
||||
pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int),
|
||||
int flags)
|
||||
{
|
||||
mutex_lock(&fixmap_lock);
|
||||
__create_pgd_mapping_locked(pgdir, phys, virt, size, prot,
|
||||
pgtable_alloc, flags);
|
||||
mutex_unlock(&fixmap_lock);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
|
||||
extern __alias(__create_pgd_mapping)
|
||||
extern __alias(__create_pgd_mapping_locked)
|
||||
void create_kpti_ng_temp_pgd(pgd_t *pgdir, phys_addr_t phys, unsigned long virt,
|
||||
phys_addr_t size, pgprot_t prot,
|
||||
phys_addr_t (*pgtable_alloc)(int), int flags);
|
||||
|
|
|
|||
|
|
@ -50,6 +50,7 @@ struct clk *clk_get_io(void)
|
|||
{
|
||||
return &cpu_clk_generic[2];
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(clk_get_io);
|
||||
|
||||
struct clk *clk_get_ppe(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
if (plat_dat->bus_id) {
|
||||
__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
|
||||
GMAC1_USE_UART0, LS1X_MUX_CTRL0);
|
||||
switch (plat_dat->interface) {
|
||||
switch (plat_dat->phy_interface) {
|
||||
case PHY_INTERFACE_MODE_RGMII:
|
||||
val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
|
||||
break;
|
||||
|
|
@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
break;
|
||||
default:
|
||||
pr_err("unsupported mii mode %d\n",
|
||||
plat_dat->interface);
|
||||
plat_dat->phy_interface);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
val &= ~GMAC1_SHUT;
|
||||
} else {
|
||||
switch (plat_dat->interface) {
|
||||
switch (plat_dat->phy_interface) {
|
||||
case PHY_INTERFACE_MODE_RGMII:
|
||||
val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
|
||||
break;
|
||||
|
|
@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
break;
|
||||
default:
|
||||
pr_err("unsupported mii mode %d\n",
|
||||
plat_dat->interface);
|
||||
plat_dat->phy_interface);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
val &= ~GMAC0_SHUT;
|
||||
|
|
@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
|
|||
plat_dat = dev_get_platdata(&pdev->dev);
|
||||
|
||||
val &= ~PHY_INTF_SELI;
|
||||
if (plat_dat->interface == PHY_INTERFACE_MODE_RMII)
|
||||
if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
|
||||
val |= 0x4 << PHY_INTF_SELI_SHIFT;
|
||||
__raw_writel(val, LS1X_MUX_CTRL1);
|
||||
|
||||
|
|
@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = {
|
|||
.bus_id = 0,
|
||||
.phy_addr = -1,
|
||||
#if defined(CONFIG_LOONGSON1_LS1B)
|
||||
.interface = PHY_INTERFACE_MODE_MII,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
#elif defined(CONFIG_LOONGSON1_LS1C)
|
||||
.interface = PHY_INTERFACE_MODE_RMII,
|
||||
.phy_interface = PHY_INTERFACE_MODE_RMII,
|
||||
#endif
|
||||
.mdio_bus_data = &ls1x_mdio_bus_data,
|
||||
.dma_cfg = &ls1x_eth_dma_cfg,
|
||||
|
|
@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev = {
|
|||
static struct plat_stmmacenet_data ls1x_eth1_pdata = {
|
||||
.bus_id = 1,
|
||||
.phy_addr = -1,
|
||||
.interface = PHY_INTERFACE_MODE_MII,
|
||||
.phy_interface = PHY_INTERFACE_MODE_MII,
|
||||
.mdio_bus_data = &ls1x_mdio_bus_data,
|
||||
.dma_cfg = &ls1x_eth_dma_cfg,
|
||||
.has_gmac = 1,
|
||||
|
|
|
|||
|
|
@ -224,8 +224,18 @@ config MLONGCALLS
|
|||
Enabling this option will probably slow down your kernel.
|
||||
|
||||
config 64BIT
|
||||
def_bool "$(ARCH)" = "parisc64"
|
||||
def_bool y if "$(ARCH)" = "parisc64"
|
||||
bool "64-bit kernel" if "$(ARCH)" = "parisc"
|
||||
depends on PA8X00
|
||||
help
|
||||
Enable this if you want to support 64bit kernel on PA-RISC platform.
|
||||
|
||||
At the moment, only people willing to use more than 2GB of RAM,
|
||||
or having a 64bit-only capable PA-RISC machine should say Y here.
|
||||
|
||||
Since there is no 64bit userland on PA-RISC, there is no point to
|
||||
enable this option otherwise. The 64bit kernel is significantly bigger
|
||||
and slower than the 32bit one.
|
||||
|
||||
choice
|
||||
prompt "Kernel page size"
|
||||
|
|
|
|||
|
|
@ -386,6 +386,7 @@ config RISCV_ISA_C
|
|||
config RISCV_ISA_SVPBMT
|
||||
bool "SVPBMT extension support"
|
||||
depends on 64BIT && MMU
|
||||
depends on !XIP_KERNEL
|
||||
select RISCV_ALTERNATIVE
|
||||
default y
|
||||
help
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ config ERRATA_THEAD
|
|||
|
||||
config ERRATA_THEAD_PBMT
|
||||
bool "Apply T-Head memory type errata"
|
||||
depends on ERRATA_THEAD && 64BIT
|
||||
depends on ERRATA_THEAD && 64BIT && MMU
|
||||
select RISCV_ALTERNATIVE_EARLY
|
||||
default y
|
||||
help
|
||||
|
|
@ -57,7 +57,7 @@ config ERRATA_THEAD_PBMT
|
|||
|
||||
config ERRATA_THEAD_CMO
|
||||
bool "Apply T-Head cache management errata"
|
||||
depends on ERRATA_THEAD
|
||||
depends on ERRATA_THEAD && MMU
|
||||
select RISCV_DMA_NONCOHERENT
|
||||
default y
|
||||
help
|
||||
|
|
|
|||
|
|
@ -37,6 +37,7 @@ static bool errata_probe_cmo(unsigned int stage,
|
|||
if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
|
||||
return false;
|
||||
|
||||
riscv_cbom_block_size = L1_CACHE_BYTES;
|
||||
riscv_noncoherent_supported();
|
||||
return true;
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -42,6 +42,11 @@ void flush_icache_mm(struct mm_struct *mm, bool local);
|
|||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
/*
|
||||
* The T-Head CMO errata internally probe the CBOM block size, but otherwise
|
||||
* don't depend on Zicbom.
|
||||
*/
|
||||
extern unsigned int riscv_cbom_block_size;
|
||||
#ifdef CONFIG_RISCV_ISA_ZICBOM
|
||||
void riscv_init_cbom_blocksize(void);
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -296,8 +296,8 @@ void __init setup_arch(char **cmdline_p)
|
|||
setup_smp();
|
||||
#endif
|
||||
|
||||
riscv_fill_hwcap();
|
||||
riscv_init_cbom_blocksize();
|
||||
riscv_fill_hwcap();
|
||||
apply_boot_alternatives();
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -124,6 +124,8 @@ SYSCALL_DEFINE0(rt_sigreturn)
|
|||
if (restore_altstack(&frame->uc.uc_stack))
|
||||
goto badframe;
|
||||
|
||||
regs->cause = -1UL;
|
||||
|
||||
return regs->a0;
|
||||
|
||||
badframe:
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@
|
|||
#include <linux/of_device.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
static unsigned int riscv_cbom_block_size = L1_CACHE_BYTES;
|
||||
unsigned int riscv_cbom_block_size;
|
||||
static bool noncoherent_supported;
|
||||
|
||||
void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
|
||||
|
|
@ -79,38 +79,41 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
|||
void riscv_init_cbom_blocksize(void)
|
||||
{
|
||||
struct device_node *node;
|
||||
unsigned long cbom_hartid;
|
||||
u32 val, probed_block_size;
|
||||
int ret;
|
||||
u32 val;
|
||||
|
||||
probed_block_size = 0;
|
||||
for_each_of_cpu_node(node) {
|
||||
unsigned long hartid;
|
||||
int cbom_hartid;
|
||||
|
||||
ret = riscv_of_processor_hartid(node, &hartid);
|
||||
if (ret)
|
||||
continue;
|
||||
|
||||
if (hartid < 0)
|
||||
continue;
|
||||
|
||||
/* set block-size for cbom extension if available */
|
||||
ret = of_property_read_u32(node, "riscv,cbom-block-size", &val);
|
||||
if (ret)
|
||||
continue;
|
||||
|
||||
if (!riscv_cbom_block_size) {
|
||||
riscv_cbom_block_size = val;
|
||||
if (!probed_block_size) {
|
||||
probed_block_size = val;
|
||||
cbom_hartid = hartid;
|
||||
} else {
|
||||
if (riscv_cbom_block_size != val)
|
||||
pr_warn("cbom-block-size mismatched between harts %d and %lu\n",
|
||||
if (probed_block_size != val)
|
||||
pr_warn("cbom-block-size mismatched between harts %lu and %lu\n",
|
||||
cbom_hartid, hartid);
|
||||
}
|
||||
}
|
||||
|
||||
if (probed_block_size)
|
||||
riscv_cbom_block_size = probed_block_size;
|
||||
}
|
||||
#endif
|
||||
|
||||
void riscv_noncoherent_supported(void)
|
||||
{
|
||||
WARN(!riscv_cbom_block_size,
|
||||
"Non-coherent DMA support enabled without a block size\n");
|
||||
noncoherent_supported = true;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -489,6 +489,8 @@ enum prot_type {
|
|||
PROT_TYPE_ALC = 2,
|
||||
PROT_TYPE_DAT = 3,
|
||||
PROT_TYPE_IEP = 4,
|
||||
/* Dummy value for passing an initialized value when code != PGM_PROTECTION */
|
||||
PROT_NONE,
|
||||
};
|
||||
|
||||
static int trans_exc_ending(struct kvm_vcpu *vcpu, int code, unsigned long gva, u8 ar,
|
||||
|
|
@ -504,6 +506,10 @@ static int trans_exc_ending(struct kvm_vcpu *vcpu, int code, unsigned long gva,
|
|||
switch (code) {
|
||||
case PGM_PROTECTION:
|
||||
switch (prot) {
|
||||
case PROT_NONE:
|
||||
/* We should never get here, acts like termination */
|
||||
WARN_ON_ONCE(1);
|
||||
break;
|
||||
case PROT_TYPE_IEP:
|
||||
tec->b61 = 1;
|
||||
fallthrough;
|
||||
|
|
@ -968,8 +974,10 @@ static int guest_range_to_gpas(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar,
|
|||
return rc;
|
||||
} else {
|
||||
gpa = kvm_s390_real_to_abs(vcpu, ga);
|
||||
if (kvm_is_error_gpa(vcpu->kvm, gpa))
|
||||
if (kvm_is_error_gpa(vcpu->kvm, gpa)) {
|
||||
rc = PGM_ADDRESSING;
|
||||
prot = PROT_NONE;
|
||||
}
|
||||
}
|
||||
if (rc)
|
||||
return trans_exc(vcpu, rc, ga, ar, mode, prot);
|
||||
|
|
@ -1112,8 +1120,6 @@ int access_guest_with_key(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar,
|
|||
if (rc == PGM_PROTECTION && try_storage_prot_override)
|
||||
rc = access_guest_page_with_key(vcpu->kvm, mode, gpas[idx],
|
||||
data, fragment_len, PAGE_SPO_ACC);
|
||||
if (rc == PGM_PROTECTION)
|
||||
prot = PROT_TYPE_KEYC;
|
||||
if (rc)
|
||||
break;
|
||||
len -= fragment_len;
|
||||
|
|
@ -1123,6 +1129,10 @@ int access_guest_with_key(struct kvm_vcpu *vcpu, unsigned long ga, u8 ar,
|
|||
if (rc > 0) {
|
||||
bool terminate = (mode == GACC_STORE) && (idx > 0);
|
||||
|
||||
if (rc == PGM_PROTECTION)
|
||||
prot = PROT_TYPE_KEYC;
|
||||
else
|
||||
prot = PROT_NONE;
|
||||
rc = trans_exc_ending(vcpu, rc, ga, ar, mode, prot, terminate);
|
||||
}
|
||||
out_unlock:
|
||||
|
|
|
|||
|
|
@ -3324,7 +3324,7 @@ static void aen_host_forward(unsigned long si)
|
|||
if (gaite->count == 0)
|
||||
return;
|
||||
if (gaite->aisb != 0)
|
||||
set_bit_inv(gaite->aisbo, (unsigned long *)gaite->aisb);
|
||||
set_bit_inv(gaite->aisbo, phys_to_virt(gaite->aisb));
|
||||
|
||||
kvm = kvm_s390_pci_si_to_kvm(aift, si);
|
||||
if (!kvm)
|
||||
|
|
|
|||
|
|
@ -505,7 +505,7 @@ int kvm_arch_init(void *opaque)
|
|||
goto out;
|
||||
}
|
||||
|
||||
if (kvm_s390_pci_interp_allowed()) {
|
||||
if (IS_ENABLED(CONFIG_VFIO_PCI_ZDEV_KVM)) {
|
||||
rc = kvm_s390_pci_init();
|
||||
if (rc) {
|
||||
pr_err("Unable to allocate AIFT for PCI\n");
|
||||
|
|
@ -527,7 +527,7 @@ out:
|
|||
void kvm_arch_exit(void)
|
||||
{
|
||||
kvm_s390_gib_destroy();
|
||||
if (kvm_s390_pci_interp_allowed())
|
||||
if (IS_ENABLED(CONFIG_VFIO_PCI_ZDEV_KVM))
|
||||
kvm_s390_pci_exit();
|
||||
debug_unregister(kvm_s390_dbf);
|
||||
debug_unregister(kvm_s390_dbf_uv);
|
||||
|
|
|
|||
|
|
@ -58,7 +58,7 @@ static int zpci_setup_aipb(u8 nisc)
|
|||
if (!zpci_aipb)
|
||||
return -ENOMEM;
|
||||
|
||||
aift->sbv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC, 0);
|
||||
aift->sbv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC, NULL);
|
||||
if (!aift->sbv) {
|
||||
rc = -ENOMEM;
|
||||
goto free_aipb;
|
||||
|
|
@ -71,7 +71,7 @@ static int zpci_setup_aipb(u8 nisc)
|
|||
rc = -ENOMEM;
|
||||
goto free_sbv;
|
||||
}
|
||||
aift->gait = (struct zpci_gaite *)page_to_phys(page);
|
||||
aift->gait = (struct zpci_gaite *)page_to_virt(page);
|
||||
|
||||
zpci_aipb->aipb.faisb = virt_to_phys(aift->sbv->vector);
|
||||
zpci_aipb->aipb.gait = virt_to_phys(aift->gait);
|
||||
|
|
@ -373,7 +373,7 @@ static int kvm_s390_pci_aif_disable(struct zpci_dev *zdev, bool force)
|
|||
gaite->gisc = 0;
|
||||
gaite->aisbo = 0;
|
||||
gaite->gisa = 0;
|
||||
aift->kzdev[zdev->aisb] = 0;
|
||||
aift->kzdev[zdev->aisb] = NULL;
|
||||
/* Clear zdev info */
|
||||
airq_iv_free_bit(aift->sbv, zdev->aisb);
|
||||
airq_iv_release(zdev->aibv);
|
||||
|
|
@ -672,23 +672,31 @@ out:
|
|||
|
||||
int kvm_s390_pci_init(void)
|
||||
{
|
||||
zpci_kvm_hook.kvm_register = kvm_s390_pci_register_kvm;
|
||||
zpci_kvm_hook.kvm_unregister = kvm_s390_pci_unregister_kvm;
|
||||
|
||||
if (!kvm_s390_pci_interp_allowed())
|
||||
return 0;
|
||||
|
||||
aift = kzalloc(sizeof(struct zpci_aift), GFP_KERNEL);
|
||||
if (!aift)
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_init(&aift->gait_lock);
|
||||
mutex_init(&aift->aift_lock);
|
||||
zpci_kvm_hook.kvm_register = kvm_s390_pci_register_kvm;
|
||||
zpci_kvm_hook.kvm_unregister = kvm_s390_pci_unregister_kvm;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void kvm_s390_pci_exit(void)
|
||||
{
|
||||
mutex_destroy(&aift->aift_lock);
|
||||
zpci_kvm_hook.kvm_register = NULL;
|
||||
zpci_kvm_hook.kvm_unregister = NULL;
|
||||
|
||||
if (!kvm_s390_pci_interp_allowed())
|
||||
return;
|
||||
|
||||
mutex_destroy(&aift->aift_lock);
|
||||
|
||||
kfree(aift);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -46,9 +46,9 @@ extern struct zpci_aift *aift;
|
|||
static inline struct kvm *kvm_s390_pci_si_to_kvm(struct zpci_aift *aift,
|
||||
unsigned long si)
|
||||
{
|
||||
if (!IS_ENABLED(CONFIG_VFIO_PCI_ZDEV_KVM) || aift->kzdev == 0 ||
|
||||
aift->kzdev[si] == 0)
|
||||
return 0;
|
||||
if (!IS_ENABLED(CONFIG_VFIO_PCI_ZDEV_KVM) || !aift->kzdev ||
|
||||
!aift->kzdev[si])
|
||||
return NULL;
|
||||
return aift->kzdev[si]->kvm;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -132,10 +132,18 @@ export LDS_ELF_FORMAT := $(ELF_FORMAT)
|
|||
# The wrappers will select whether using "malloc" or the kernel allocator.
|
||||
LINK_WRAPS = -Wl,--wrap,malloc -Wl,--wrap,free -Wl,--wrap,calloc
|
||||
|
||||
# Avoid binutils 2.39+ warnings by marking the stack non-executable and
|
||||
# ignorning warnings for the kallsyms sections.
|
||||
LDFLAGS_EXECSTACK = -z noexecstack
|
||||
ifeq ($(CONFIG_LD_IS_BFD),y)
|
||||
LDFLAGS_EXECSTACK += $(call ld-option,--no-warn-rwx-segments)
|
||||
endif
|
||||
|
||||
LD_FLAGS_CMDLINE = $(foreach opt,$(KBUILD_LDFLAGS),-Wl,$(opt))
|
||||
|
||||
# Used by link-vmlinux.sh which has special support for um link
|
||||
export CFLAGS_vmlinux := $(LINK-y) $(LINK_WRAPS) $(LD_FLAGS_CMDLINE)
|
||||
export LDFLAGS_vmlinux := $(LDFLAGS_EXECSTACK)
|
||||
|
||||
# When cleaning we don't include .config, so we don't include
|
||||
# TT or skas makefiles and don't clean skas_ptregs.h.
|
||||
|
|
|
|||
|
|
@ -48,7 +48,8 @@ void show_stack(struct task_struct *task, unsigned long *stack,
|
|||
break;
|
||||
if (i && ((i % STACKSLOTS_PER_LINE) == 0))
|
||||
pr_cont("\n");
|
||||
pr_cont(" %08lx", *stack++);
|
||||
pr_cont(" %08lx", READ_ONCE_NOCHECK(*stack));
|
||||
stack++;
|
||||
}
|
||||
|
||||
printk("%sCall Trace:\n", loglvl);
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@
|
|||
#include "um_arch.h"
|
||||
|
||||
#define DEFAULT_COMMAND_LINE_ROOT "root=98:0"
|
||||
#define DEFAULT_COMMAND_LINE_CONSOLE "console=tty"
|
||||
#define DEFAULT_COMMAND_LINE_CONSOLE "console=tty0"
|
||||
|
||||
/* Changed in add_arg and setup_arch, which run before SMP is started */
|
||||
static char __initdata command_line[COMMAND_LINE_SIZE] = { 0 };
|
||||
|
|
|
|||
|
|
@ -729,6 +729,7 @@ struct kvm_vcpu_arch {
|
|||
struct fpu_guest guest_fpu;
|
||||
|
||||
u64 xcr0;
|
||||
u64 guest_supported_xcr0;
|
||||
|
||||
struct kvm_pio_request pio;
|
||||
void *pio_data;
|
||||
|
|
|
|||
|
|
@ -315,7 +315,6 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
|
|||
{
|
||||
struct kvm_lapic *apic = vcpu->arch.apic;
|
||||
struct kvm_cpuid_entry2 *best;
|
||||
u64 guest_supported_xcr0;
|
||||
|
||||
best = kvm_find_cpuid_entry(vcpu, 1);
|
||||
if (best && apic) {
|
||||
|
|
@ -327,10 +326,16 @@ static void kvm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
|
|||
kvm_apic_set_version(vcpu);
|
||||
}
|
||||
|
||||
guest_supported_xcr0 =
|
||||
vcpu->arch.guest_supported_xcr0 =
|
||||
cpuid_get_supported_xcr0(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent);
|
||||
|
||||
vcpu->arch.guest_fpu.fpstate->user_xfeatures = guest_supported_xcr0;
|
||||
/*
|
||||
* FP+SSE can always be saved/restored via KVM_{G,S}ET_XSAVE, even if
|
||||
* XSAVE/XCRO are not exposed to the guest, and even if XSAVE isn't
|
||||
* supported by the host.
|
||||
*/
|
||||
vcpu->arch.guest_fpu.fpstate->user_xfeatures = vcpu->arch.guest_supported_xcr0 |
|
||||
XFEATURE_MASK_FPSSE;
|
||||
|
||||
kvm_update_pv_runtime(vcpu);
|
||||
|
||||
|
|
|
|||
|
|
@ -4132,6 +4132,9 @@ static int em_xsetbv(struct x86_emulate_ctxt *ctxt)
|
|||
{
|
||||
u32 eax, ecx, edx;
|
||||
|
||||
if (!(ctxt->ops->get_cr(ctxt, 4) & X86_CR4_OSXSAVE))
|
||||
return emulate_ud(ctxt);
|
||||
|
||||
eax = reg_read(ctxt, VCPU_REGS_RAX);
|
||||
edx = reg_read(ctxt, VCPU_REGS_RDX);
|
||||
ecx = reg_read(ctxt, VCPU_REGS_RCX);
|
||||
|
|
|
|||
|
|
@ -1596,6 +1596,8 @@ static void __rmap_add(struct kvm *kvm,
|
|||
rmap_head = gfn_to_rmap(gfn, sp->role.level, slot);
|
||||
rmap_count = pte_list_add(cache, spte, rmap_head);
|
||||
|
||||
if (rmap_count > kvm->stat.max_mmu_rmap_size)
|
||||
kvm->stat.max_mmu_rmap_size = rmap_count;
|
||||
if (rmap_count > RMAP_RECYCLE_THRESHOLD) {
|
||||
kvm_zap_all_rmap_sptes(kvm, rmap_head);
|
||||
kvm_flush_remote_tlbs_with_address(
|
||||
|
|
|
|||
|
|
@ -1011,15 +1011,10 @@ void kvm_load_host_xsave_state(struct kvm_vcpu *vcpu)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(kvm_load_host_xsave_state);
|
||||
|
||||
static inline u64 kvm_guest_supported_xcr0(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return vcpu->arch.guest_fpu.fpstate->user_xfeatures;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
static inline u64 kvm_guest_supported_xfd(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
return kvm_guest_supported_xcr0(vcpu) & XFEATURE_MASK_USER_DYNAMIC;
|
||||
return vcpu->arch.guest_supported_xcr0 & XFEATURE_MASK_USER_DYNAMIC;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
@ -1042,7 +1037,7 @@ static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
|
|||
* saving. However, xcr0 bit 0 is always set, even if the
|
||||
* emulated CPU does not support XSAVE (see kvm_vcpu_reset()).
|
||||
*/
|
||||
valid_bits = kvm_guest_supported_xcr0(vcpu) | XFEATURE_MASK_FP;
|
||||
valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
|
||||
if (xcr0 & ~valid_bits)
|
||||
return 1;
|
||||
|
||||
|
|
@ -1070,6 +1065,7 @@ static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
|
|||
|
||||
int kvm_emulate_xsetbv(struct kvm_vcpu *vcpu)
|
||||
{
|
||||
/* Note, #UD due to CR4.OSXSAVE=0 has priority over the intercept. */
|
||||
if (static_call(kvm_x86_get_cpl)(vcpu) != 0 ||
|
||||
__kvm_set_xcr(vcpu, kvm_rcx_read(vcpu), kvm_read_edx_eax(vcpu))) {
|
||||
kvm_inject_gp(vcpu, 0);
|
||||
|
|
|
|||
|
|
@ -6,10 +6,9 @@
|
|||
#include <asm/unistd.h>
|
||||
#include <sysdep/ptrace.h>
|
||||
|
||||
typedef long syscall_handler_t(struct pt_regs);
|
||||
typedef long syscall_handler_t(struct syscall_args);
|
||||
|
||||
extern syscall_handler_t *sys_call_table[];
|
||||
|
||||
#define EXECUTE_SYSCALL(syscall, regs) \
|
||||
((long (*)(struct syscall_args)) \
|
||||
(*sys_call_table[syscall]))(SYSCALL_ARGS(®s->regs))
|
||||
((*sys_call_table[syscall]))(SYSCALL_ARGS(®s->regs))
|
||||
|
|
|
|||
|
|
@ -65,9 +65,6 @@ static int get_free_idx(struct task_struct* task)
|
|||
struct thread_struct *t = &task->thread;
|
||||
int idx;
|
||||
|
||||
if (!t->arch.tls_array)
|
||||
return GDT_ENTRY_TLS_MIN;
|
||||
|
||||
for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++)
|
||||
if (!t->arch.tls_array[idx].present)
|
||||
return idx + GDT_ENTRY_TLS_MIN;
|
||||
|
|
@ -240,9 +237,6 @@ static int get_tls_entry(struct task_struct *task, struct user_desc *info,
|
|||
{
|
||||
struct thread_struct *t = &task->thread;
|
||||
|
||||
if (!t->arch.tls_array)
|
||||
goto clear;
|
||||
|
||||
if (idx < GDT_ENTRY_TLS_MIN || idx > GDT_ENTRY_TLS_MAX)
|
||||
return -EINVAL;
|
||||
|
||||
|
|
|
|||
|
|
@ -65,7 +65,7 @@ quiet_cmd_vdso = VDSO $@
|
|||
-Wl,-T,$(filter %.lds,$^) $(filter %.o,$^) && \
|
||||
sh $(srctree)/$(src)/checkundef.sh '$(NM)' '$@'
|
||||
|
||||
VDSO_LDFLAGS = -fPIC -shared -Wl,--hash-style=sysv
|
||||
VDSO_LDFLAGS = -fPIC -shared -Wl,--hash-style=sysv -z noexecstack
|
||||
GCOV_PROFILE := n
|
||||
|
||||
#
|
||||
|
|
|
|||
|
|
@ -295,7 +295,7 @@ int blk_queue_enter(struct request_queue *q, blk_mq_req_flags_t flags)
|
|||
|
||||
while (!blk_try_enter_queue(q, pm)) {
|
||||
if (flags & BLK_MQ_REQ_NOWAIT)
|
||||
return -EBUSY;
|
||||
return -EAGAIN;
|
||||
|
||||
/*
|
||||
* read pair of barrier in blk_freeze_queue_start(), we need to
|
||||
|
|
@ -325,7 +325,7 @@ int __bio_queue_enter(struct request_queue *q, struct bio *bio)
|
|||
if (test_bit(GD_DEAD, &disk->state))
|
||||
goto dead;
|
||||
bio_wouldblock_error(bio);
|
||||
return -EBUSY;
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -309,6 +309,11 @@ int blkdev_issue_secure_erase(struct block_device *bdev, sector_t sector,
|
|||
struct blk_plug plug;
|
||||
int ret = 0;
|
||||
|
||||
/* make sure that "len << SECTOR_SHIFT" doesn't overflow */
|
||||
if (max_sectors > UINT_MAX >> SECTOR_SHIFT)
|
||||
max_sectors = UINT_MAX >> SECTOR_SHIFT;
|
||||
max_sectors &= ~bs_mask;
|
||||
|
||||
if (max_sectors == 0)
|
||||
return -EOPNOTSUPP;
|
||||
if ((sector | nr_sects) & bs_mask)
|
||||
|
|
@ -322,10 +327,10 @@ int blkdev_issue_secure_erase(struct block_device *bdev, sector_t sector,
|
|||
|
||||
bio = blk_next_bio(bio, bdev, 0, REQ_OP_SECURE_ERASE, gfp);
|
||||
bio->bi_iter.bi_sector = sector;
|
||||
bio->bi_iter.bi_size = len;
|
||||
bio->bi_iter.bi_size = len << SECTOR_SHIFT;
|
||||
|
||||
sector += len << SECTOR_SHIFT;
|
||||
nr_sects -= len << SECTOR_SHIFT;
|
||||
sector += len;
|
||||
nr_sects -= len;
|
||||
if (!nr_sects) {
|
||||
ret = submit_bio_wait(bio);
|
||||
bio_put(bio);
|
||||
|
|
|
|||
|
|
@ -602,7 +602,6 @@ void del_gendisk(struct gendisk *disk)
|
|||
* Prevent new I/O from crossing bio_queue_enter().
|
||||
*/
|
||||
blk_queue_start_drain(q);
|
||||
blk_mq_freeze_queue_wait(q);
|
||||
|
||||
if (!(disk->flags & GENHD_FL_HIDDEN)) {
|
||||
sysfs_remove_link(&disk_to_dev(disk)->kobj, "bdi");
|
||||
|
|
@ -626,6 +625,8 @@ void del_gendisk(struct gendisk *disk)
|
|||
pm_runtime_set_memalloc_noio(disk_to_dev(disk), false);
|
||||
device_del(disk_to_dev(disk));
|
||||
|
||||
blk_mq_freeze_queue_wait(q);
|
||||
|
||||
blk_throtl_cancel_bios(disk->queue);
|
||||
|
||||
blk_sync_queue(q);
|
||||
|
|
|
|||
|
|
@ -43,7 +43,7 @@ config SYSTEM_TRUSTED_KEYRING
|
|||
bool "Provide system-wide ring of trusted keys"
|
||||
depends on KEYS
|
||||
depends on ASYMMETRIC_KEY_TYPE
|
||||
depends on X509_CERTIFICATE_PARSER
|
||||
depends on X509_CERTIFICATE_PARSER = y
|
||||
help
|
||||
Provide a system keyring to which trusted keys can be added. Keys in
|
||||
the keyring are considered to be trusted. Keys may be added at will
|
||||
|
|
|
|||
|
|
@ -1625,7 +1625,7 @@ static int __init fw_devlink_setup(char *arg)
|
|||
}
|
||||
early_param("fw_devlink", fw_devlink_setup);
|
||||
|
||||
static bool fw_devlink_strict = true;
|
||||
static bool fw_devlink_strict;
|
||||
static int __init fw_devlink_strict_setup(char *arg)
|
||||
{
|
||||
return strtobool(arg, &fw_devlink_strict);
|
||||
|
|
|
|||
|
|
@ -449,6 +449,9 @@ static int quad8_events_configure(struct counter_device *counter)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Enable IRQ line */
|
||||
irq_enabled |= BIT(event_node->channel);
|
||||
|
||||
/* Skip configuration if it is the same as previously set */
|
||||
if (priv->irq_trigger[event_node->channel] == next_irq_trigger)
|
||||
continue;
|
||||
|
|
@ -462,9 +465,6 @@ static int quad8_events_configure(struct counter_device *counter)
|
|||
priv->irq_trigger[event_node->channel] << 3;
|
||||
iowrite8(QUAD8_CTR_IOR | ior_cfg,
|
||||
&priv->reg->channel[event_node->channel].control);
|
||||
|
||||
/* Enable IRQ line */
|
||||
irq_enabled |= BIT(event_node->channel);
|
||||
}
|
||||
|
||||
iowrite8(irq_enabled, &priv->reg->index_interrupt);
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@ void hmem_register_device(int target_nid, struct resource *r)
|
|||
.start = r->start,
|
||||
.end = r->end,
|
||||
.flags = IORESOURCE_MEM,
|
||||
.desc = IORES_DESC_SOFT_RESERVED,
|
||||
};
|
||||
struct platform_device *pdev;
|
||||
struct memregion_info info;
|
||||
|
|
|
|||
|
|
@ -31,14 +31,14 @@ struct udma_dev *of_xudma_dev_get(struct device_node *np, const char *property)
|
|||
}
|
||||
|
||||
pdev = of_find_device_by_node(udma_node);
|
||||
if (np != udma_node)
|
||||
of_node_put(udma_node);
|
||||
|
||||
if (!pdev) {
|
||||
pr_debug("UDMA device not found\n");
|
||||
return ERR_PTR(-EPROBE_DEFER);
|
||||
}
|
||||
|
||||
if (np != udma_node)
|
||||
of_node_put(udma_node);
|
||||
|
||||
ud = platform_get_drvdata(pdev);
|
||||
if (!ud) {
|
||||
pr_debug("UDMA has not been probed\n");
|
||||
|
|
|
|||
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Reference in New Issue