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drm/i915: GMBUS don't need no forcewake
GMBUS is part of the display engine, and thus has no need for
forcewake. Let's not bother trying to grab it then.
I don't recall if the display engine suffers from system hangs
due to multiple accesses to the same "cacheline" in mmio space.
I hope not since we're no longer protected by the uncore lock
since commit 4e6c2d58ba
("drm/i915: Take forcewake once for
the entire GMBUS transaction")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: David Weinehall <david.weinehall@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476272687-15070-1-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
06a75ace46
commit
862372bc8f
1 changed files with 0 additions and 5 deletions
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@ -467,13 +467,9 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
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struct intel_gmbus,
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adapter);
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struct drm_i915_private *dev_priv = bus->dev_priv;
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const unsigned int fw =
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intel_uncore_forcewake_for_reg(dev_priv, GMBUS0,
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FW_REG_READ | FW_REG_WRITE);
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int i = 0, inc, try = 0;
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int ret = 0;
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intel_uncore_forcewake_get(dev_priv, fw);
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retry:
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I915_WRITE_FW(GMBUS0, bus->reg0);
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@ -575,7 +571,6 @@ do_gmbus_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num)
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ret = -EAGAIN;
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out:
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intel_uncore_forcewake_put(dev_priv, fw);
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return ret;
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}
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