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ARM: dts: fix PCLK name on Gemini and MOXA ART
These platforms provide a clock to their watchdog, in each case this is the peripheral clock (PCLK), so explicitly name the clock in the device tree. Take this opportunity to add the "faraday,ftwdt010" compatible as fallback to the watchdog IP blocks. Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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2 changed files with 4 additions and 2 deletions
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@ -145,11 +145,12 @@ mux1 {
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};
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};
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watchdog@41000000 {
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watchdog@41000000 {
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compatible = "cortina,gemini-watchdog";
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compatible = "cortina,gemini-watchdog", "faraday,ftwdt010";
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reg = <0x41000000 0x1000>;
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reg = <0x41000000 0x1000>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&syscon GEMINI_RESET_WDOG>;
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resets = <&syscon GEMINI_RESET_WDOG>;
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clocks = <&syscon GEMINI_CLK_APB>;
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clocks = <&syscon GEMINI_CLK_APB>;
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clock-names = "PCLK";
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};
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};
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uart0: serial@42000000 {
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uart0: serial@42000000 {
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@ -87,9 +87,10 @@ dma: dma@90500000 {
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};
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};
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watchdog: watchdog@98500000 {
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watchdog: watchdog@98500000 {
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compatible = "moxa,moxart-watchdog";
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compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
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reg = <0x98500000 0x10>;
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reg = <0x98500000 0x10>;
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clocks = <&clk_apb>;
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clocks = <&clk_apb>;
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clock-names = "PCLK";
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};
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};
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sdhci: sdhci@98e00000 {
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sdhci: sdhci@98e00000 {
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