PCI: keystone: Set device ID based on SoC to support multiple ports

K2E SoC has two PCI ports.  The SATA controller is connected to second PCI
port (port 1).  To support multiple port handling in Keystone PCI driver,
read the PCI device ID dynamically by iomap/read/unmap during probe and
save it in driver's private data and update it in host init code.  The PCI
device ID field in the RC's config space is not filled by default by the
hardware and has to be updated by the PCI driver by reading the same from
the SoC register indicated by reg index #2 in DT bindings.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Murali Karicheri 2014-09-10 13:12:39 -04:00 committed by Bjorn Helgaas
parent 4455efc908
commit 8665a482db
2 changed files with 7 additions and 6 deletions

View file

@ -253,8 +253,8 @@ static int keystone_pcie_fault(unsigned long addr, unsigned int fsr,
static void __init ks_pcie_host_init(struct pcie_port *pp)
{
u32 vendor_device_id, val;
struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);
u32 val;
ks_pcie_establish_link(ks_pcie);
ks_dw_pcie_setup_rc_app_regs(ks_pcie);
@ -263,8 +263,7 @@ static void __init ks_pcie_host_init(struct pcie_port *pp)
pp->dbi_base + PCI_IO_BASE);
/* update the Vendor ID */
vendor_device_id = readl(ks_pcie->va_reg_pciid);
writew((vendor_device_id >> 16), pp->dbi_base + PCI_DEVICE_ID);
writew(ks_pcie->device_id, pp->dbi_base + PCI_DEVICE_ID);
/* update the DEV_STAT_CTRL to publish right mrrs */
val = readl(pp->dbi_base + PCIE_CAP_BASE + PCI_EXP_DEVCTL);
@ -373,7 +372,9 @@ static int __init ks_pcie_probe(struct platform_device *pdev)
reg_p = devm_ioremap_resource(dev, res);
if (IS_ERR(reg_p))
return PTR_ERR(reg_p);
ks_pcie->va_reg_pciid = reg_p;
ks_pcie->device_id = readl(reg_p) >> 16;
devm_iounmap(dev, reg_p);
devm_release_mem_region(dev, res->start, resource_size(res));
pp->dev = dev;
platform_set_drvdata(pdev, ks_pcie);

View file

@ -19,8 +19,8 @@
struct keystone_pcie {
struct clk *clk;
struct pcie_port pp;
void __iomem *va_reg_pciid;
/* PCI Device ID */
u32 device_id;
int num_legacy_host_irqs;
int legacy_host_irqs[MAX_LEGACY_HOST_IRQS];
struct device_node *legacy_intc_np;