ARM: dts: apq8064: Add DT support for GSBI6 and for UART pin mux

This change adds DT support for GSBI6 and muxes the gpio pins
as UART lines. Also defines a alias for serial port on these lines.

Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
[Srinivas Kandagatla]: fix pinctrl location and rename alias correctly
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This commit is contained in:
Pramod Gurav 2015-07-27 14:52:10 +01:00 committed by Andy Gross
parent bce3604696
commit 86e252a4f8
2 changed files with 42 additions and 1 deletions

View file

@ -7,6 +7,7 @@ / {
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi6_serial;
};
soc {
@ -115,6 +116,18 @@ eeprom: eeprom@52 {
};
};
gsbi@16500000 {
status = "ok";
qcom,mode = <GSBI_PROT_I2C_UART>;
serial@16540000 {
status = "ok";
pinctrl-names = "default";
pinctrl-0 = <&uart_pins>;
};
};
gsbi@16600000 {
status = "ok";
qcom,mode = <GSBI_PROT_I2C_UART>;

View file

@ -126,6 +126,13 @@ mux {
function = "gsbi3";
};
};
uart_pins: uart_pins {
mux {
pins = "gpio14", "gpio15", "gpio16", "gpio17";
function = "gsbi6";
};
};
};
intc: interrupt-controller@2000000 {
@ -248,7 +255,6 @@ gsbi3: gsbi@16200000 {
#address-cells = <1>;
#size-cells = <1>;
ranges;
i2c3: i2c@16280000 {
compatible = "qcom,i2c-qup-v1.1.1";
reg = <0x16280000 0x1000>;
@ -259,6 +265,28 @@ i2c3: i2c@16280000 {
};
};
gsbi6: gsbi@16500000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";
cell-index = <6>;
reg = <0x16500000 0x03>;
clocks = <&gcc GSBI6_H_CLK>;
clock-names = "iface";
#address-cells = <1>;
#size-cells = <1>;
ranges;
gsbi6_serial: serial@16540000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x16540000 0x100>,
<0x16500000 0x03>;
interrupts = <0 156 0x0>;
clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
clock-names = "core", "iface";
status = "disabled";
};
};
gsbi7: gsbi@16600000 {
status = "disabled";
compatible = "qcom,gsbi-v1.0.0";