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intel-pinctrl for v5.14-2
* Fix the software mapping of GPIOs on Intel Tiger Lake-H The following is an automated git shortlog grouped by driver: tigerlake: - Fix GPIO mapping for newer version of software -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEqaflIX74DDDzMJJtb7wzTHR8rCgFAmEM/J0ACgkQb7wzTHR8 rCgJwBAAiianaFjpoLfvDcGw+CHFVYwe7qn8M6Qm3F3pxcEKr14X36p9wW6ABNYz GFry+gxSCX3ULAfMDDq6lFAwja/1jWSXWHtiJIM2Pf3dCI0CSFWhb2NWN66cxeEe trof9O99zY4oLu3Q1csLqqlqBcembV6zp06J5aV+XE1L6s4BX9a72TqobT1zNq+U MydbsXVZE+NEz9u9Yu/OKKjzcBCvliedt6NKiJrBK4JWH2a0Vjxfz7edefZLuQJO uclGGBfgbF8u+Awmzs2iUTvRY6XZ9GJSxtM3a9qWQJQUi+tDiNhXbr+LsEHERRXO AD0a4bAXWkkeBje7YoThx7SKgFFZaZKpTKttUMNZFAfLIoPI9PuWqKz2xhiAcD1X cb7lSddtKlOBXrR6xi8iMwa9coZuXL6zTlaGUWl8x3Uy1yOwn17MM6Me+b35FCH8 v36ds3G8VlKJKmt9h7nJr9OD7/zv7kHCPvIgLoEOF28yjw03Ch5SUDPYpAnQtltt N1X9n3mEA9YB7OxVPhJP/3GzAiUHghnWY8EZnNzIGOiF/El+mgn9P4xuHgt46nSC waqK60za5BsqEVcr0S1ZT4W1F7qCZkIqx+MQ8yrF4Mt5liESJPaOofkimsuMElTD PAn8mbhn3hFZ2siYYrx+DEyralz9Y61hm2EUtjHwV+NrQtv0lyg= =xU7N -----END PGP SIGNATURE----- Merge tag 'intel-pinctrl-v5.14-2' of gitolite.kernel.org:pub/scm/linux/kernel/git/pinctrl/intel into fixes intel-pinctrl for v5.14-2 * Fix the software mapping of GPIOs on Intel Tiger Lake-H The following is an automated git shortlog grouped by driver: tigerlake: - Fix GPIO mapping for newer version of software
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commit
86e5fbcaf7
1 changed files with 13 additions and 13 deletions
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@ -701,32 +701,32 @@ static const struct pinctrl_pin_desc tglh_pins[] = {
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static const struct intel_padgroup tglh_community0_gpps[] = {
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TGL_GPP(0, 0, 24, 0), /* GPP_A */
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TGL_GPP(1, 25, 44, 128), /* GPP_R */
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TGL_GPP(2, 45, 70, 32), /* GPP_B */
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TGL_GPP(3, 71, 78, INTEL_GPIO_BASE_NOMAP), /* vGPIO_0 */
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TGL_GPP(1, 25, 44, 32), /* GPP_R */
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TGL_GPP(2, 45, 70, 64), /* GPP_B */
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TGL_GPP(3, 71, 78, 96), /* vGPIO_0 */
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};
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static const struct intel_padgroup tglh_community1_gpps[] = {
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TGL_GPP(0, 79, 104, 96), /* GPP_D */
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TGL_GPP(1, 105, 128, 64), /* GPP_C */
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TGL_GPP(2, 129, 136, 160), /* GPP_S */
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TGL_GPP(3, 137, 153, 192), /* GPP_G */
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TGL_GPP(4, 154, 180, 224), /* vGPIO */
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TGL_GPP(0, 79, 104, 128), /* GPP_D */
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TGL_GPP(1, 105, 128, 160), /* GPP_C */
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TGL_GPP(2, 129, 136, 192), /* GPP_S */
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TGL_GPP(3, 137, 153, 224), /* GPP_G */
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TGL_GPP(4, 154, 180, 256), /* vGPIO */
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};
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static const struct intel_padgroup tglh_community3_gpps[] = {
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TGL_GPP(0, 181, 193, 256), /* GPP_E */
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TGL_GPP(1, 194, 217, 288), /* GPP_F */
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TGL_GPP(0, 181, 193, 288), /* GPP_E */
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TGL_GPP(1, 194, 217, 320), /* GPP_F */
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};
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static const struct intel_padgroup tglh_community4_gpps[] = {
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TGL_GPP(0, 218, 241, 320), /* GPP_H */
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TGL_GPP(0, 218, 241, 352), /* GPP_H */
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TGL_GPP(1, 242, 251, 384), /* GPP_J */
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TGL_GPP(2, 252, 266, 352), /* GPP_K */
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TGL_GPP(2, 252, 266, 416), /* GPP_K */
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};
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static const struct intel_padgroup tglh_community5_gpps[] = {
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TGL_GPP(0, 267, 281, 416), /* GPP_I */
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TGL_GPP(0, 267, 281, 448), /* GPP_I */
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TGL_GPP(1, 282, 290, INTEL_GPIO_BASE_NOMAP), /* JTAG */
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};
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