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clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998
[ Upstream commitc0ee0e43c0
] See similar issue solved by commit5f2420ed21
("clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998") Without this patch, PCIe PHY init fails: qcom-qmp-phy 1c06000.phy: pipe_clk enable failed err=-16 phy phy-1c06000.phy.0: phy init failed --> -16 Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr> Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org> Fixes:b5f5f525c5
("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver") Signed-off-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 1 additions and 1 deletions
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@ -2144,7 +2144,7 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = {
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static struct clk_branch gcc_pcie_0_pipe_clk = {
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.halt_reg = 0x6b018,
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.halt_check = BRANCH_HALT,
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.halt_check = BRANCH_HALT_SKIP,
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.clkr = {
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.enable_reg = 0x6b018,
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.enable_mask = BIT(0),
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