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net: phy: at803x: fix the wol setting functions

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[ Upstream commit e58f30246c ]

In commit 7beecaf7d5 ("net: phy: at803x: improve the WOL feature"), it
seems not correct to use a wol_en bit in a 1588 Control Register which is
only available on AR8031/AR8033(share the same phy_id) to determine if WoL
is enabled.  Change it back to use AT803X_INTR_ENABLE_WOL for determining
the WoL status which is applicable on all chips supporting wol. Also update
the at803x_set_wol() function to only update the 1588 register on chips
having it.  After this change, disabling wol at probe from commit
d7cd5e06c9 ("net: phy: at803x: disable WOL at probe") is no longer
needed.  Change it to just disable the WoL bit in 1588 register for
AR8031/AR8033 to be aligned with AT803X_INTR_ENABLE_WOL in probe.

Fixes: 7beecaf7d5 ("net: phy: at803x: improve the WOL feature")
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Wei Fang <wei.fang@nxp.com>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Li Yang 2023-08-02 14:13:46 -05:00 committed by Greg Kroah-Hartman
parent b129b7537a
commit 86fd1f1ec4
1 changed files with 25 additions and 20 deletions
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33
drivers/net/phy/at803x.c
View file

@ -459,21 +459,27 @@ static int at803x_set_wol(struct phy_device *phydev,
phy_write_mmd(phydev, MDIO_MMD_PCS, offsets[i], phy_write_mmd(phydev, MDIO_MMD_PCS, offsets[i],
mac[(i * 2) + 1] | (mac[(i * 2)] << 8)); mac[(i * 2) + 1] | (mac[(i * 2)] << 8));
/* Enable WOL function */ /* Enable WOL function for 1588 */
ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL, if (phydev->drv->phy_id == ATH8031_PHY_ID) {
ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,
AT803X_PHY_MMD3_WOL_CTRL,
0, AT803X_WOL_EN); 0, AT803X_WOL_EN);
if (ret) if (ret)
return ret; return ret;
}
/* Enable WOL interrupt */ /* Enable WOL interrupt */
ret = phy_modify(phydev, AT803X_INTR_ENABLE, 0, AT803X_INTR_ENABLE_WOL); ret = phy_modify(phydev, AT803X_INTR_ENABLE, 0, AT803X_INTR_ENABLE_WOL);
if (ret) if (ret)
return ret; return ret;
} else { } else {
/* Disable WoL function */ /* Disable WoL function for 1588 */
ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL, if (phydev->drv->phy_id == ATH8031_PHY_ID) {
ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,
AT803X_PHY_MMD3_WOL_CTRL,
AT803X_WOL_EN, 0); AT803X_WOL_EN, 0);
if (ret) if (ret)
return ret; return ret;
}
/* Disable WOL interrupt */ /* Disable WOL interrupt */
ret = phy_modify(phydev, AT803X_INTR_ENABLE, AT803X_INTR_ENABLE_WOL, 0); ret = phy_modify(phydev, AT803X_INTR_ENABLE, AT803X_INTR_ENABLE_WOL, 0);
if (ret) if (ret)
@ -508,11 +514,11 @@ static void at803x_get_wol(struct phy_device *phydev,
wol->supported = WAKE_MAGIC; wol->supported = WAKE_MAGIC;
wol->wolopts = 0; wol->wolopts = 0;
value = phy_read_mmd(phydev, MDIO_MMD_PCS, AT803X_PHY_MMD3_WOL_CTRL); value = phy_read(phydev, AT803X_INTR_ENABLE);
if (value < 0) if (value < 0)
return; return;
if (value & AT803X_WOL_EN) if (value & AT803X_INTR_ENABLE_WOL)
wol->wolopts |= WAKE_MAGIC; wol->wolopts |= WAKE_MAGIC;
} }
@ -858,9 +864,6 @@ static int at803x_probe(struct phy_device *phydev)
if (phydev->drv->phy_id == ATH8031_PHY_ID) { if (phydev->drv->phy_id == ATH8031_PHY_ID) {
int ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG); int ccr = phy_read(phydev, AT803X_REG_CHIP_CONFIG);
int mode_cfg; int mode_cfg;
struct ethtool_wolinfo wol = {
.wolopts = 0,
};
if (ccr < 0) if (ccr < 0)
return ccr; return ccr;
@ -877,13 +880,15 @@ static int at803x_probe(struct phy_device *phydev)
break; break;
} }
/* Disable WOL by default */ /* Disable WoL in 1588 register which is enabled
ret = at803x_set_wol(phydev, &wol); * by default
if (ret < 0) { */
phydev_err(phydev, "failed to disable WOL on probe: %d\n", ret); ret = phy_modify_mmd(phydev, MDIO_MMD_PCS,
AT803X_PHY_MMD3_WOL_CTRL,
AT803X_WOL_EN, 0);
if (ret)
return ret; return ret;
} }
}
return 0; return 0;
} }