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media: rc: nuvoton: remove rudimentary transmit functionality
Transmit support in this driver was never tested and based on the code it can't work. Just one example: The buffer provided to nvt_tx_ir holds unsigned int values in micro seconds: First value is for a pulse, second for a pause, etc. Bytes in this buffer are copied as-is to the chip FIFO what can't work as the chip-internal format is totally different. See also conversion done in nvt_process_rx_ir_data. Even if we would try to fix this we have the issue that we can't test it. There seems to be no device on the market using IR transmit with one of the chips supported by this driver. To facilitate maintenance of the driver I'd propose to remove the rudimentary transmit support. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Sean Young <sean@mess.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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a8c2d62b1b
commit
87284271b7
2 changed files with 3 additions and 135 deletions
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@ -727,70 +727,6 @@ static int nvt_ir_raw_set_wakeup_filter(struct rc_dev *dev,
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return ret;
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}
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/*
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* nvt_tx_ir
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*
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* 1) clean TX fifo first (handled by AP)
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* 2) copy data from user space
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* 3) disable RX interrupts, enable TX interrupts: TTR & TFU
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* 4) send 9 packets to TX FIFO to open TTR
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* in interrupt_handler:
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* 5) send all data out
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* go back to write():
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* 6) disable TX interrupts, re-enable RX interupts
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*
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* The key problem of this function is user space data may larger than
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* driver's data buf length. So nvt_tx_ir() will only copy TX_BUF_LEN data to
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* buf, and keep current copied data buf num in cur_buf_num. But driver's buf
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* number may larger than TXFCONT (0xff). So in interrupt_handler, it has to
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* set TXFCONT as 0xff, until buf_count less than 0xff.
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*/
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static int nvt_tx_ir(struct rc_dev *dev, unsigned *txbuf, unsigned n)
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{
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struct nvt_dev *nvt = dev->priv;
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unsigned long flags;
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unsigned int i;
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u8 iren;
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int ret;
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spin_lock_irqsave(&nvt->lock, flags);
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ret = min((unsigned)(TX_BUF_LEN / sizeof(unsigned)), n);
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nvt->tx.buf_count = (ret * sizeof(unsigned));
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memcpy(nvt->tx.buf, txbuf, nvt->tx.buf_count);
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nvt->tx.cur_buf_num = 0;
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/* save currently enabled interrupts */
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iren = nvt_cir_reg_read(nvt, CIR_IREN);
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/* now disable all interrupts, save TFU & TTR */
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nvt_cir_reg_write(nvt, CIR_IREN_TFU | CIR_IREN_TTR, CIR_IREN);
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nvt->tx.tx_state = ST_TX_REPLY;
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nvt_cir_reg_write(nvt, CIR_FIFOCON_TX_TRIGGER_LEV_8 |
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CIR_FIFOCON_RXFIFOCLR, CIR_FIFOCON);
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/* trigger TTR interrupt by writing out ones, (yes, it's ugly) */
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for (i = 0; i < 9; i++)
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nvt_cir_reg_write(nvt, 0x01, CIR_STXFIFO);
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spin_unlock_irqrestore(&nvt->lock, flags);
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wait_event(nvt->tx.queue, nvt->tx.tx_state == ST_TX_REQUEST);
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spin_lock_irqsave(&nvt->lock, flags);
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nvt->tx.tx_state = ST_TX_NONE;
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spin_unlock_irqrestore(&nvt->lock, flags);
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/* restore enabled interrupts to prior state */
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nvt_cir_reg_write(nvt, iren, CIR_IREN);
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return ret;
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}
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/* dump contents of the last rx buffer we got from the hw rx fifo */
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static void nvt_dump_rx_buf(struct nvt_dev *nvt)
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{
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@ -895,11 +831,6 @@ static void nvt_cir_log_irqs(u8 status, u8 iren)
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CIR_IRSTS_TFU | CIR_IRSTS_GH) ? " ?" : "");
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}
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static bool nvt_cir_tx_inactive(struct nvt_dev *nvt)
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{
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return nvt->tx.tx_state == ST_TX_NONE;
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}
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/* interrupt service routine for incoming and outgoing CIR data */
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static irqreturn_t nvt_cir_isr(int irq, void *data)
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{
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@ -952,40 +883,8 @@ static irqreturn_t nvt_cir_isr(int irq, void *data)
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if (status & CIR_IRSTS_RFO)
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nvt_handle_rx_fifo_overrun(nvt);
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else if (status & (CIR_IRSTS_RTR | CIR_IRSTS_PE)) {
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/* We only do rx if not tx'ing */
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if (nvt_cir_tx_inactive(nvt))
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nvt_get_rx_ir_data(nvt);
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}
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if (status & CIR_IRSTS_TE)
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nvt_clear_tx_fifo(nvt);
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if (status & CIR_IRSTS_TTR) {
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unsigned int pos, count;
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u8 tmp;
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pos = nvt->tx.cur_buf_num;
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count = nvt->tx.buf_count;
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/* Write data into the hardware tx fifo while pos < count */
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if (pos < count) {
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nvt_cir_reg_write(nvt, nvt->tx.buf[pos], CIR_STXFIFO);
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nvt->tx.cur_buf_num++;
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/* Disable TX FIFO Trigger Level Reach (TTR) interrupt */
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} else {
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tmp = nvt_cir_reg_read(nvt, CIR_IREN);
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nvt_cir_reg_write(nvt, tmp & ~CIR_IREN_TTR, CIR_IREN);
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}
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}
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if (status & CIR_IRSTS_TFU) {
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if (nvt->tx.tx_state == ST_TX_REPLY) {
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nvt->tx.tx_state = ST_TX_REQUEST;
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wake_up(&nvt->tx.queue);
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}
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}
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else if (status & (CIR_IRSTS_RTR | CIR_IRSTS_PE))
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nvt_get_rx_ir_data(nvt);
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spin_unlock(&nvt->lock);
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@ -1062,7 +961,7 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
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if (!nvt)
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return -ENOMEM;
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/* input device for IR remote (and tx) */
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/* input device for IR remote */
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nvt->rdev = devm_rc_allocate_device(&pdev->dev, RC_DRIVER_IR_RAW);
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if (!nvt->rdev)
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return -ENOMEM;
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@ -1105,8 +1004,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
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pnp_set_drvdata(pdev, nvt);
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init_waitqueue_head(&nvt->tx.queue);
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ret = nvt_hw_detect(nvt);
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if (ret)
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return ret;
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@ -1131,7 +1028,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
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rdev->encode_wakeup = true;
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rdev->open = nvt_open;
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rdev->close = nvt_close;
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rdev->tx_ir = nvt_tx_ir;
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rdev->s_tx_carrier = nvt_set_tx_carrier;
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rdev->s_wakeup_filter = nvt_ir_raw_set_wakeup_filter;
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rdev->device_name = "Nuvoton w836x7hg Infrared Remote Transceiver";
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@ -1148,8 +1044,6 @@ static int nvt_probe(struct pnp_dev *pdev, const struct pnp_device_id *dev_id)
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#if 0
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rdev->min_timeout = XYZ;
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rdev->max_timeout = XYZ;
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/* tx bits */
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rdev->tx_resolution = XYZ;
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#endif
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ret = devm_rc_register_device(&pdev->dev, rdev);
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if (ret)
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@ -1205,8 +1099,6 @@ static int nvt_suspend(struct pnp_dev *pdev, pm_message_t state)
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spin_lock_irqsave(&nvt->lock, flags);
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nvt->tx.tx_state = ST_TX_NONE;
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/* disable all CIR interrupts */
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nvt_cir_reg_write(nvt, 0, CIR_IREN);
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@ -46,14 +46,6 @@ static int debug;
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KBUILD_MODNAME ": " text "\n" , ## __VA_ARGS__)
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/*
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* Original lirc driver said min value of 76, and recommended value of 256
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* for the buffer length, but then used 2048. Never mind that the size of the
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* RX FIFO is 32 bytes... So I'm using 32 for RX and 256 for TX atm, but I'm
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* not sure if maybe that TX value is off by a factor of 8 (bits vs. bytes),
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* and I don't have TX-capable hardware to test/debug on...
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*/
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#define TX_BUF_LEN 256
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#define RX_BUF_LEN 32
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#define SIO_ID_MASK 0xfff0
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@ -81,14 +73,6 @@ struct nvt_dev {
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u8 buf[RX_BUF_LEN];
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unsigned int pkts;
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struct {
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u8 buf[TX_BUF_LEN];
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unsigned int buf_count;
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unsigned int cur_buf_num;
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wait_queue_head_t queue;
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u8 tx_state;
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} tx;
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/* EFER Config register index/data pair */
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u32 cr_efir;
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u32 cr_efdr;
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@ -103,18 +87,10 @@ struct nvt_dev {
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u8 chip_major;
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u8 chip_minor;
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/* hardware features */
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bool hw_tx_capable;
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/* carrier period = 1 / frequency */
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u32 carrier;
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};
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/* send states */
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#define ST_TX_NONE 0x0
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#define ST_TX_REQUEST 0x2
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#define ST_TX_REPLY 0x4
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/* buffer packet constants */
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#define BUF_PULSE_BIT 0x80
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#define BUF_LEN_MASK 0x7f
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