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ath5k: treat RXORN as non-fatal
We get RXORN interrupts when all receive buffers are full. This is not necessarily a fatal situation. It can also happen when the bus is busy or the CPU is not fast enough to process all frames. Older chipsets apparently need a reset to come out of this situration, but on newer chips we can treat RXORN like RX, as going thru a full reset does more harm than good, there. The exact chip revisions which need a reset are unknown - this guess AR5K_SREV_AR5212 ("venice") is copied from the HAL. Inspired by openwrt 413-rxorn.patch: "treat rxorn like rx, reset after rxorn seems to do more harm than good" Signed-off-by: Bruno Randolf <br1@einfach.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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2 changed files with 15 additions and 1 deletions
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@ -2705,7 +2705,20 @@ ath5k_intr(int irq, void *dev_id)
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*/
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tasklet_schedule(&sc->restq);
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} else if (unlikely(status & AR5K_INT_RXORN)) {
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tasklet_schedule(&sc->restq);
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/*
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* Receive buffers are full. Either the bus is busy or
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* the CPU is not fast enough to process all received
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* frames.
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* Older chipsets need a reset to come out of this
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* condition, but we treat it as RX for newer chips.
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* We don't know exactly which versions need a reset -
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* this guess is copied from the HAL.
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*/
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sc->stats.rxorn_intr++;
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if (ah->ah_mac_srev < AR5K_SREV_AR5212)
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tasklet_schedule(&sc->restq);
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else
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tasklet_schedule(&sc->rxtq);
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} else {
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if (status & AR5K_INT_SWBA) {
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tasklet_hi_schedule(&sc->beacontq);
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@ -135,6 +135,7 @@ struct ath5k_statistics {
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unsigned int beacons;
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unsigned int mib_intr;
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unsigned int rxorn_intr;
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};
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#if CHAN_DEBUG
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