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spi: rspi: Add support for Quad and Dual SPI Transfers on QSPI
Add support for Quad and Dual SPI Transfers on the Renesas Quad Serial Peripheral Interface, as found in R-Car Gen2 SoCs like R-Car H2 (r8a7790) and R-Car M2 (r8a7791): - Add unidirectional transfer methods for Quad/Dual SPI Transfers. - Program the sequencer to handle SPI messages with multiple transfer modes when Quad or Dual transfers are enabled for an SPI slave. Up to 4 transfer modes per SPI message are supported by the hardware. - Advertise the availability of Quad and Dual SPI modes on QSPI. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
This commit is contained in:
parent
426ef76dd8
commit
880c6d114f
1 changed files with 148 additions and 14 deletions
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@ -2,6 +2,7 @@
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* SH RSPI driver
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*
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* Copyright (C) 2012, 2013 Renesas Solutions Corp.
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* Copyright (C) 2014 Glider bvba
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*
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* Based on spi-sh.c:
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* Copyright (C) 2011 Renesas Solutions Corp.
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@ -57,6 +58,10 @@
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#define RSPI_SPCMD5 0x1a /* Command Register 5 */
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#define RSPI_SPCMD6 0x1c /* Command Register 6 */
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#define RSPI_SPCMD7 0x1e /* Command Register 7 */
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#define RSPI_SPCMD(i) (RSPI_SPCMD0 + (i) * 2)
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#define RSPI_NUM_SPCMD 8
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#define RSPI_RZ_NUM_SPCMD 4
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#define QSPI_NUM_SPCMD 4
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/* RSPI on RZ only */
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#define RSPI_SPBFCR 0x20 /* Buffer Control Register */
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@ -69,6 +74,7 @@
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#define QSPI_SPBMUL1 0x20 /* Transfer Data Length Multiplier Setting Register 1 */
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#define QSPI_SPBMUL2 0x24 /* Transfer Data Length Multiplier Setting Register 2 */
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#define QSPI_SPBMUL3 0x28 /* Transfer Data Length Multiplier Setting Register 3 */
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#define QSPI_SPBMUL(i) (QSPI_SPBMUL0 + (i) * 4)
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/* SPCR - Control Register */
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#define SPCR_SPRIE 0x80 /* Receive Interrupt Enable */
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@ -152,7 +158,7 @@
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#define SPCMD_LSBF 0x1000 /* LSB First */
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#define SPCMD_SPB_MASK 0x0f00 /* Data Length Setting */
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#define SPCMD_SPB_8_TO_16(bit) (((bit - 1) << 8) & SPCMD_SPB_MASK)
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#define SPCMD_SPB_8BIT 0x0000 /* qspi only */
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#define SPCMD_SPB_8BIT 0x0000 /* QSPI only */
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#define SPCMD_SPB_16BIT 0x0100
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#define SPCMD_SPB_20BIT 0x0000
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#define SPCMD_SPB_24BIT 0x0100
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@ -245,6 +251,7 @@ struct spi_ops {
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int (*set_config_register)(struct rspi_data *rspi, int access_size);
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int (*transfer_one)(struct spi_master *master, struct spi_device *spi,
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struct spi_transfer *xfer);
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u16 mode_bits;
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};
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/*
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@ -274,8 +281,8 @@ static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
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rspi_write8(rspi, 0x00, RSPI_SPCR2);
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/* Sets SPCMD */
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rspi_write16(rspi, SPCMD_SPB_8_TO_16(access_size) | rspi->spcmd,
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RSPI_SPCMD0);
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rspi->spcmd |= SPCMD_SPB_8_TO_16(access_size);
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rspi_write16(rspi, rspi->spcmd, RSPI_SPCMD0);
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/* Sets RSPI mode */
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rspi_write8(rspi, SPCR_MSTR, RSPI_SPCR);
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@ -321,7 +328,6 @@ static int rspi_rz_set_config_register(struct rspi_data *rspi, int access_size)
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*/
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static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
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{
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u16 spcmd;
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int spbr;
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/* Sets output mode, MOSI signal, and (optionally) loopback */
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@ -342,13 +348,13 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
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/* Data Length Setting */
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if (access_size == 8)
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spcmd = SPCMD_SPB_8BIT;
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rspi->spcmd |= SPCMD_SPB_8BIT;
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else if (access_size == 16)
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spcmd = SPCMD_SPB_16BIT;
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rspi->spcmd |= SPCMD_SPB_16BIT;
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else
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spcmd = SPCMD_SPB_32BIT;
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rspi->spcmd |= SPCMD_SPB_32BIT;
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spcmd |= SPCMD_SCKDEN | SPCMD_SLNDEN | rspi->spcmd | SPCMD_SPNDEN;
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rspi->spcmd |= SPCMD_SCKDEN | SPCMD_SLNDEN | SPCMD_SPNDEN;
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/* Resets transfer data length */
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rspi_write32(rspi, 0, QSPI_SPBMUL0);
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@ -359,9 +365,9 @@ static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
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rspi_write8(rspi, 0x00, QSPI_SPBFCR);
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/* Sets SPCMD */
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rspi_write16(rspi, spcmd, RSPI_SPCMD0);
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rspi_write16(rspi, rspi->spcmd, RSPI_SPCMD0);
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/* Enables SPI function in a master mode */
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/* Enables SPI function in master mode */
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rspi_write8(rspi, SPCR_SPE | SPCR_MSTR, RSPI_SPCR);
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return 0;
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@ -811,12 +817,55 @@ static int qspi_transfer_out_in(struct rspi_data *rspi,
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return 0;
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}
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static int qspi_transfer_out(struct rspi_data *rspi, struct spi_transfer *xfer)
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{
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const u8 *buf = xfer->tx_buf;
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unsigned int i;
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int ret;
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for (i = 0; i < xfer->len; i++) {
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ret = rspi_data_out(rspi, *buf++);
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if (ret < 0)
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return ret;
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}
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/* Wait for the last transmission */
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rspi_wait_for_interrupt(rspi, SPSR_SPTEF, SPCR_SPTIE);
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return 0;
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}
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static int qspi_transfer_in(struct rspi_data *rspi, struct spi_transfer *xfer)
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{
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u8 *buf = xfer->rx_buf;
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unsigned int i;
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int ret;
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for (i = 0; i < xfer->len; i++) {
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ret = rspi_data_in(rspi);
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if (ret < 0)
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return ret;
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*buf++ = ret;
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}
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return 0;
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}
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static int qspi_transfer_one(struct spi_master *master, struct spi_device *spi,
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struct spi_transfer *xfer)
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{
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struct rspi_data *rspi = spi_master_get_devdata(master);
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return qspi_transfer_out_in(rspi, xfer);
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if (xfer->tx_buf && xfer->tx_nbits > SPI_NBITS_SINGLE) {
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/* Quad or Dual SPI Write */
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return qspi_transfer_out(rspi, xfer);
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} else if (xfer->rx_buf && xfer->rx_nbits > SPI_NBITS_SINGLE) {
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/* Quad or Dual SPI Read */
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return qspi_transfer_in(rspi, xfer);
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} else {
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/* Single SPI Transfer */
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return qspi_transfer_out_in(rspi, xfer);
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}
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}
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static int rspi_setup(struct spi_device *spi)
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@ -845,21 +894,101 @@ static void rspi_cleanup(struct spi_device *spi)
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{
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}
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static u16 qspi_transfer_mode(const struct spi_transfer *xfer)
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{
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if (xfer->tx_buf)
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switch (xfer->tx_nbits) {
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case SPI_NBITS_QUAD:
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return SPCMD_SPIMOD_QUAD;
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case SPI_NBITS_DUAL:
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return SPCMD_SPIMOD_DUAL;
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default:
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return 0;
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}
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if (xfer->rx_buf)
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switch (xfer->rx_nbits) {
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case SPI_NBITS_QUAD:
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return SPCMD_SPIMOD_QUAD | SPCMD_SPRW;
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case SPI_NBITS_DUAL:
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return SPCMD_SPIMOD_DUAL | SPCMD_SPRW;
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default:
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return 0;
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}
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return 0;
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}
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static int qspi_setup_sequencer(struct rspi_data *rspi,
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const struct spi_message *msg)
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{
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const struct spi_transfer *xfer;
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unsigned int i = 0, len = 0;
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u16 current_mode = 0xffff, mode;
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list_for_each_entry(xfer, &msg->transfers, transfer_list) {
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mode = qspi_transfer_mode(xfer);
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if (mode == current_mode) {
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len += xfer->len;
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continue;
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}
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/* Transfer mode change */
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if (i) {
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/* Set transfer data length of previous transfer */
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rspi_write32(rspi, len, QSPI_SPBMUL(i - 1));
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}
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if (i >= QSPI_NUM_SPCMD) {
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dev_err(&msg->spi->dev,
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"Too many different transfer modes");
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return -EINVAL;
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}
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/* Program transfer mode for this transfer */
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rspi_write16(rspi, rspi->spcmd | mode, RSPI_SPCMD(i));
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current_mode = mode;
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len = xfer->len;
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i++;
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}
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if (i) {
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/* Set final transfer data length and sequence length */
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rspi_write32(rspi, len, QSPI_SPBMUL(i - 1));
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rspi_write8(rspi, i - 1, RSPI_SPSCR);
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}
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return 0;
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}
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static int rspi_prepare_message(struct spi_master *master,
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struct spi_message *message)
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struct spi_message *msg)
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{
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struct rspi_data *rspi = spi_master_get_devdata(master);
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int ret;
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if (msg->spi->mode &
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(SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD)) {
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/* Setup sequencer for messages with multiple transfer modes */
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ret = qspi_setup_sequencer(rspi, msg);
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if (ret < 0)
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return ret;
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}
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/* Enable SPI function in master mode */
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rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) | SPCR_SPE, RSPI_SPCR);
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return 0;
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}
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static int rspi_unprepare_message(struct spi_master *master,
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struct spi_message *message)
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struct spi_message *msg)
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{
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struct rspi_data *rspi = spi_master_get_devdata(master);
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/* Disable SPI function */
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rspi_write8(rspi, rspi_read8(rspi, RSPI_SPCR) & ~SPCR_SPE, RSPI_SPCR);
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/* Reset sequencer for Single SPI Transfers */
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rspi_write16(rspi, rspi->spcmd, RSPI_SPCMD0);
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rspi_write8(rspi, 0, RSPI_SPSCR);
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return 0;
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}
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@ -989,16 +1118,21 @@ static int rspi_remove(struct platform_device *pdev)
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static const struct spi_ops rspi_ops = {
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.set_config_register = rspi_set_config_register,
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.transfer_one = rspi_transfer_one,
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.mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
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};
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static const struct spi_ops rspi_rz_ops = {
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.set_config_register = rspi_rz_set_config_register,
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.transfer_one = rspi_rz_transfer_one,
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.mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP,
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};
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static const struct spi_ops qspi_ops = {
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.set_config_register = qspi_set_config_register,
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.transfer_one = qspi_transfer_one,
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.mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP |
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SPI_TX_DUAL | SPI_TX_QUAD |
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SPI_RX_DUAL | SPI_RX_QUAD,
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};
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#ifdef CONFIG_OF
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@ -1120,7 +1254,7 @@ static int rspi_probe(struct platform_device *pdev)
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master->cleanup = rspi_cleanup;
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master->prepare_message = rspi_prepare_message;
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master->unprepare_message = rspi_unprepare_message;
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master->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LOOP;
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master->mode_bits = ops->mode_bits;
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master->dev.of_node = pdev->dev.of_node;
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ret = platform_get_irq_byname(pdev, "rx");
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