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dmaengine: ti: k3-udma: Add support for BCDMA channel TPL handling
Unlike UDMAP the BCDMA defines the channel TPL levels per channel type. In UDMAP the number of high and ultra-high channels applies to both tchan and rchan. BCDMA defines the TPL per channel types: bchan, tchan and rchan can have different number of high and ultra-high channels. In order to support BCDMA channel TPL we need to move the tpl information as per channel type property for the DMAs. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20201208090440.31792-19-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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parent
0177947397
commit
8844898028
2 changed files with 85 additions and 38 deletions
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@ -146,6 +146,11 @@ struct udma_rx_flush {
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dma_addr_t buffer_paddr;
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};
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struct udma_tpl {
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u8 levels;
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u32 start_idx[3];
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};
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struct udma_dev {
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struct dma_device ddev;
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struct device *dev;
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@ -153,8 +158,9 @@ struct udma_dev {
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const struct udma_match_data *match_data;
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const struct udma_soc_data *soc_data;
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u8 tpl_levels;
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u32 tpl_start_idx[3];
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struct udma_tpl bchan_tpl;
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struct udma_tpl tchan_tpl;
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struct udma_tpl rchan_tpl;
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size_t desc_align; /* alignment to use for descriptors */
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@ -1276,10 +1282,10 @@ static struct udma_##res *__udma_reserve_##res(struct udma_dev *ud, \
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} else { \
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int start; \
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\
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if (tpl >= ud->tpl_levels) \
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tpl = ud->tpl_levels - 1; \
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if (tpl >= ud->res##_tpl.levels) \
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tpl = ud->res##_tpl.levels - 1; \
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\
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start = ud->tpl_start_idx[tpl]; \
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start = ud->res##_tpl.start_idx[tpl]; \
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\
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id = find_next_zero_bit(ud->res##_map, ud->res##_cnt, \
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start); \
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@ -1292,29 +1298,14 @@ static struct udma_##res *__udma_reserve_##res(struct udma_dev *ud, \
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return &ud->res##s[id]; \
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}
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UDMA_RESERVE_RESOURCE(bchan);
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UDMA_RESERVE_RESOURCE(tchan);
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UDMA_RESERVE_RESOURCE(rchan);
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static struct udma_bchan *__bcdma_reserve_bchan(struct udma_dev *ud, int id)
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{
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if (id >= 0) {
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if (test_bit(id, ud->bchan_map)) {
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dev_err(ud->dev, "bchan%d is in use\n", id);
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return ERR_PTR(-ENOENT);
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}
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} else {
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id = find_next_zero_bit(ud->bchan_map, ud->bchan_cnt, 0);
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if (id == ud->bchan_cnt)
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return ERR_PTR(-ENOENT);
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}
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set_bit(id, ud->bchan_map);
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return &ud->bchans[id];
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}
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static int bcdma_get_bchan(struct udma_chan *uc)
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{
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struct udma_dev *ud = uc->ud;
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enum udma_tp_level tpl;
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if (uc->bchan) {
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dev_dbg(ud->dev, "chan%d: already have bchan%d allocated\n",
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@ -1322,7 +1313,16 @@ static int bcdma_get_bchan(struct udma_chan *uc)
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return 0;
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}
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uc->bchan = __bcdma_reserve_bchan(ud, -1);
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/*
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* Use normal channels for peripherals, and highest TPL channel for
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* mem2mem
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*/
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if (uc->config.tr_trigger_type)
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tpl = 0;
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else
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tpl = ud->bchan_tpl.levels - 1;
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uc->bchan = __udma_reserve_bchan(ud, tpl, -1);
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if (IS_ERR(uc->bchan))
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return PTR_ERR(uc->bchan);
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@ -1384,8 +1384,11 @@ static int udma_get_chan_pair(struct udma_chan *uc)
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/* Can be optimized, but let's have it like this for now */
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end = min(ud->tchan_cnt, ud->rchan_cnt);
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/* Try to use the highest TPL channel pair for MEM_TO_MEM channels */
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chan_id = ud->tpl_start_idx[ud->tpl_levels - 1];
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/*
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* Try to use the highest TPL channel pair for MEM_TO_MEM channels
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* Note: in UDMAP the channel TPL is symmetric between tchan and rchan
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*/
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chan_id = ud->tchan_tpl.start_idx[ud->tchan_tpl.levels - 1];
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for (; chan_id < end; chan_id++) {
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if (!test_bit(chan_id, ud->tchan_map) &&
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!test_bit(chan_id, ud->rchan_map))
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@ -4036,23 +4039,27 @@ static int udma_setup_resources(struct udma_dev *ud)
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cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c);
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if (of_device_is_compatible(dev->of_node,
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"ti,am654-navss-main-udmap")) {
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ud->tpl_levels = 2;
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ud->tpl_start_idx[0] = 8;
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ud->tchan_tpl.levels = 2;
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ud->tchan_tpl.start_idx[0] = 8;
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} else if (of_device_is_compatible(dev->of_node,
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"ti,am654-navss-mcu-udmap")) {
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ud->tpl_levels = 2;
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ud->tpl_start_idx[0] = 2;
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ud->tchan_tpl.levels = 2;
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ud->tchan_tpl.start_idx[0] = 2;
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} else if (UDMA_CAP3_UCHAN_CNT(cap3)) {
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ud->tpl_levels = 3;
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ud->tpl_start_idx[1] = UDMA_CAP3_UCHAN_CNT(cap3);
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ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
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ud->tchan_tpl.levels = 3;
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ud->tchan_tpl.start_idx[1] = UDMA_CAP3_UCHAN_CNT(cap3);
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ud->tchan_tpl.start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
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} else if (UDMA_CAP3_HCHAN_CNT(cap3)) {
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ud->tpl_levels = 2;
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ud->tpl_start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
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ud->tchan_tpl.levels = 2;
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ud->tchan_tpl.start_idx[0] = UDMA_CAP3_HCHAN_CNT(cap3);
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} else {
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ud->tpl_levels = 1;
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ud->tchan_tpl.levels = 1;
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}
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ud->rchan_tpl.levels = ud->tchan_tpl.levels;
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ud->rchan_tpl.start_idx[0] = ud->tchan_tpl.start_idx[0];
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ud->rchan_tpl.start_idx[1] = ud->tchan_tpl.start_idx[1];
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ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt),
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sizeof(unsigned long), GFP_KERNEL);
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ud->tchans = devm_kcalloc(dev, ud->tchan_cnt, sizeof(*ud->tchans),
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@ -4174,6 +4181,43 @@ static int bcdma_setup_resources(struct udma_dev *ud)
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struct ti_sci_resource *rm_res, irq_res;
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struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
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const struct udma_oes_offsets *oes = &ud->soc_data->oes;
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u32 cap;
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/* Set up the throughput level start indexes */
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cap = udma_read(ud->mmrs[MMR_GCFG], 0x2c);
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if (BCDMA_CAP3_UBCHAN_CNT(cap)) {
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ud->bchan_tpl.levels = 3;
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ud->bchan_tpl.start_idx[1] = BCDMA_CAP3_UBCHAN_CNT(cap);
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ud->bchan_tpl.start_idx[0] = BCDMA_CAP3_HBCHAN_CNT(cap);
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} else if (BCDMA_CAP3_HBCHAN_CNT(cap)) {
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ud->bchan_tpl.levels = 2;
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ud->bchan_tpl.start_idx[0] = BCDMA_CAP3_HBCHAN_CNT(cap);
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} else {
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ud->bchan_tpl.levels = 1;
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}
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cap = udma_read(ud->mmrs[MMR_GCFG], 0x30);
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if (BCDMA_CAP4_URCHAN_CNT(cap)) {
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ud->rchan_tpl.levels = 3;
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ud->rchan_tpl.start_idx[1] = BCDMA_CAP4_URCHAN_CNT(cap);
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ud->rchan_tpl.start_idx[0] = BCDMA_CAP4_HRCHAN_CNT(cap);
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} else if (BCDMA_CAP4_HRCHAN_CNT(cap)) {
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ud->rchan_tpl.levels = 2;
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ud->rchan_tpl.start_idx[0] = BCDMA_CAP4_HRCHAN_CNT(cap);
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} else {
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ud->rchan_tpl.levels = 1;
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}
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if (BCDMA_CAP4_UTCHAN_CNT(cap)) {
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ud->tchan_tpl.levels = 3;
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ud->tchan_tpl.start_idx[1] = BCDMA_CAP4_UTCHAN_CNT(cap);
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ud->tchan_tpl.start_idx[0] = BCDMA_CAP4_HTCHAN_CNT(cap);
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} else if (BCDMA_CAP4_HTCHAN_CNT(cap)) {
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ud->tchan_tpl.levels = 2;
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ud->tchan_tpl.start_idx[0] = BCDMA_CAP4_HTCHAN_CNT(cap);
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} else {
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ud->tchan_tpl.levels = 1;
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}
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ud->bchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->bchan_cnt),
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sizeof(unsigned long), GFP_KERNEL);
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!ud->rflows)
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return -ENOMEM;
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/* TPL is not yet supported for BCDMA */
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ud->tpl_levels = 1;
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/* Get resource ranges from tisci */
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for (i = 0; i < RM_RANGE_LAST; i++) {
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if (i == RM_RANGE_RFLOW)
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@ -48,6 +48,12 @@
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#define BCDMA_CAP2_BCHAN_CNT(val) ((val) & 0x1ff)
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#define BCDMA_CAP2_TCHAN_CNT(val) (((val) >> 9) & 0x1ff)
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#define BCDMA_CAP2_RCHAN_CNT(val) (((val) >> 18) & 0x1ff)
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#define BCDMA_CAP3_HBCHAN_CNT(val) (((val) >> 14) & 0x1ff)
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#define BCDMA_CAP3_UBCHAN_CNT(val) (((val) >> 23) & 0x1ff)
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#define BCDMA_CAP4_HRCHAN_CNT(val) ((val) & 0xff)
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#define BCDMA_CAP4_URCHAN_CNT(val) (((val) >> 8) & 0xff)
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#define BCDMA_CAP4_HTCHAN_CNT(val) (((val) >> 16) & 0xff)
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#define BCDMA_CAP4_UTCHAN_CNT(val) (((val) >> 24) & 0xff)
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/* UDMA_CHAN_RT_CTL_REG */
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#define UDMA_CHAN_RT_CTL_EN BIT(31)
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