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accel/habanalabs: handle f/w reserved dram space request

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It is possible for FW to request reserved space in dram.
If the device supports this option, it will retrieve the size from the
f/w and will reserve it.

Currently we add the common code infrastructure to support it.

Signed-off-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
This commit is contained in:
Dani Liberman 2023-06-20 12:09:17 +03:00 committed by Oded Gabbay
parent fa46c7bb50
commit 8887279092
3 changed files with 14 additions and 0 deletions
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5
drivers/accel/habanalabs/common/firmware_if.c
View file

@ -2783,6 +2783,11 @@ static int hl_fw_dynamic_init_cpu(struct hl_device *hdev,
hdev->decoder_binning, hdev->rotator_binning);
}
if (hdev->asic_prop.support_dynamic_resereved_fw_size) {
hdev->asic_prop.reserved_fw_mem_size =
le32_to_cpu(fw_loader->dynamic_loader.comm_desc.rsvd_mem_size_mb);
}
return 0;
}

4
drivers/accel/habanalabs/common/habanalabs.h
View file

@ -641,6 +641,7 @@ struct hl_hints_range {
* @glbl_err_cause_num: global err cause number.
* @hbw_flush_reg: register to read to generate HBW flush. value of 0 means HBW flush is
* not supported.
* @reserved_fw_mem_size: size in MB of dram memory reserved for FW.
* @collective_first_sob: first sync object available for collective use
* @collective_first_mon: first monitor available for collective use
* @sync_stream_first_sob: first sync object available for sync stream use
@ -689,6 +690,7 @@ struct hl_hints_range {
* @dma_mask: the dma mask to be set for this device
* @supports_advanced_cpucp_rc: true if new cpucp opcodes are supported.
* @supports_engine_modes: true if changing engines/engine_cores modes is supported.
* @support_dynamic_resereved_fw_size: true if we support dynamic reserved size for fw.
*/
struct asic_fixed_properties {
struct hw_queue_properties *hw_queues_props;
@ -772,6 +774,7 @@ struct asic_fixed_properties {
u32 num_of_special_blocks;
u32 glbl_err_cause_num;
u32 hbw_flush_reg;
u32 reserved_fw_mem_size;
u16 collective_first_sob;
u16 collective_first_mon;
u16 sync_stream_first_sob;
@ -808,6 +811,7 @@ struct asic_fixed_properties {
u8 dma_mask;
u8 supports_advanced_cpucp_rc;
u8 supports_engine_modes;
u8 support_dynamic_resereved_fw_size;
};
/**

5
drivers/accel/habanalabs/include/common/hl_boot_if.h
View file

@ -570,6 +570,8 @@ struct lkd_fw_comms_desc {
__le64 img_addr; /* address for next FW component load */
struct lkd_fw_binning_info binning_info;
struct lkd_fw_ascii_msg ascii_msg[LKD_FW_ASCII_MSG_MAX];
__le32 rsvd_mem_size_mb; /* reserved memory size [MB] for FW/SVE */
char reserved1[4];
};
enum comms_reset_cause {
@ -596,6 +598,9 @@ struct lkd_fw_comms_msg {
__le64 img_addr;
struct lkd_fw_binning_info binning_info;
struct lkd_fw_ascii_msg ascii_msg[LKD_FW_ASCII_MSG_MAX];
/* reserved memory size [MB] for FW/SVE */
__le32 rsvd_mem_size_mb;
char reserved1[4];
};
struct {
__u8 reset_cause;