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KVM: PPC: e500: Move vcpu's MMU configuration to dedicated functions
Vcpu's MMU default configuration and geometry update logic was buried in a chunk of code. Move them to dedicated functions to add more clarity. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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parent
a85d2aa23e
commit
8893a188b1
1 changed files with 38 additions and 22 deletions
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@ -690,6 +690,20 @@ int kvmppc_set_one_reg_e500_tlb(struct kvm_vcpu *vcpu, u64 id,
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return r;
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}
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static int vcpu_mmu_geometry_update(struct kvm_vcpu *vcpu,
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struct kvm_book3e_206_tlb_params *params)
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{
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vcpu->arch.tlbcfg[0] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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if (params->tlb_sizes[0] <= 2048)
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vcpu->arch.tlbcfg[0] |= params->tlb_sizes[0];
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vcpu->arch.tlbcfg[0] |= params->tlb_ways[0] << TLBnCFG_ASSOC_SHIFT;
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vcpu->arch.tlbcfg[1] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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vcpu->arch.tlbcfg[1] |= params->tlb_sizes[1];
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vcpu->arch.tlbcfg[1] |= params->tlb_ways[1] << TLBnCFG_ASSOC_SHIFT;
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return 0;
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}
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int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
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struct kvm_config_tlb *cfg)
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{
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@ -786,16 +800,8 @@ int kvm_vcpu_ioctl_config_tlb(struct kvm_vcpu *vcpu,
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vcpu_e500->gtlb_offset[0] = 0;
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vcpu_e500->gtlb_offset[1] = params.tlb_sizes[0];
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vcpu->arch.mmucfg = mfspr(SPRN_MMUCFG) & ~MMUCFG_LPIDSIZE;
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vcpu->arch.tlbcfg[0] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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if (params.tlb_sizes[0] <= 2048)
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vcpu->arch.tlbcfg[0] |= params.tlb_sizes[0];
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vcpu->arch.tlbcfg[0] |= params.tlb_ways[0] << TLBnCFG_ASSOC_SHIFT;
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vcpu->arch.tlbcfg[1] &= ~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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vcpu->arch.tlbcfg[1] |= params.tlb_sizes[1];
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vcpu->arch.tlbcfg[1] |= params.tlb_ways[1] << TLBnCFG_ASSOC_SHIFT;
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/* Update vcpu's MMU geometry based on SW_TLB input */
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vcpu_mmu_geometry_update(vcpu, ¶ms);
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vcpu_e500->shared_tlb_pages = pages;
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vcpu_e500->num_shared_tlb_pages = num_pages;
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@ -831,6 +837,27 @@ int kvm_vcpu_ioctl_dirty_tlb(struct kvm_vcpu *vcpu,
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return 0;
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}
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/* Vcpu's MMU default configuration */
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static int vcpu_mmu_init(struct kvm_vcpu *vcpu,
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struct kvmppc_e500_tlb_params *params)
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{
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/* Initialize RASIZE, PIDSIZE, NTLBS and MAVN fields with host values*/
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vcpu->arch.mmucfg = mfspr(SPRN_MMUCFG) & ~MMUCFG_LPIDSIZE;
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/* Initialize TLBnCFG fields with host values and SW_TLB geometry*/
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vcpu->arch.tlbcfg[0] = mfspr(SPRN_TLB0CFG) &
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~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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vcpu->arch.tlbcfg[0] |= params[0].entries;
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vcpu->arch.tlbcfg[0] |= params[0].ways << TLBnCFG_ASSOC_SHIFT;
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vcpu->arch.tlbcfg[1] = mfspr(SPRN_TLB1CFG) &
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~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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vcpu->arch.tlbcfg[1] |= params[1].entries;
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vcpu->arch.tlbcfg[1] |= params[1].ways << TLBnCFG_ASSOC_SHIFT;
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return 0;
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}
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int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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struct kvm_vcpu *vcpu = &vcpu_e500->vcpu;
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@ -875,18 +902,7 @@ int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500)
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if (!vcpu_e500->g2h_tlb1_map)
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goto err;
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/* Init TLB configuration register */
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vcpu->arch.tlbcfg[0] = mfspr(SPRN_TLB0CFG) &
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~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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vcpu->arch.tlbcfg[0] |= vcpu_e500->gtlb_params[0].entries;
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vcpu->arch.tlbcfg[0] |=
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vcpu_e500->gtlb_params[0].ways << TLBnCFG_ASSOC_SHIFT;
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vcpu->arch.tlbcfg[1] = mfspr(SPRN_TLB1CFG) &
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~(TLBnCFG_N_ENTRY | TLBnCFG_ASSOC);
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vcpu->arch.tlbcfg[1] |= vcpu_e500->gtlb_params[1].entries;
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vcpu->arch.tlbcfg[1] |=
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vcpu_e500->gtlb_params[1].ways << TLBnCFG_ASSOC_SHIFT;
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vcpu_mmu_init(vcpu, vcpu_e500->gtlb_params);
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kvmppc_recalc_tlb1map_range(vcpu_e500);
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return 0;
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