mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-09-27 12:57:53 +00:00
spi: Add support for stacked/parallel memories
Merge series from Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>: This patch series adds support to the SPI framework for using multiple chip selects.
This commit is contained in:
Mark Brown
commit
88a50c1663
4 changed files with 259 additions and 53 deletions
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@ -98,7 +98,7 @@ static int tps6594_spi_probe(struct spi_device *spi)
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spi_set_drvdata(spi, tps);
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tps->dev = dev;
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tps->reg = spi->chip_select;
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tps->reg = spi_get_chipselect(spi, 0);
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tps->irq = spi->irq;
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tps->regmap = devm_regmap_init(dev, NULL, spi, &tps6594_spi_regmap_config);
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@ -612,10 +612,21 @@ static int spi_dev_check(struct device *dev, void *data)
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{
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struct spi_device *spi = to_spi_device(dev);
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struct spi_device *new_spi = data;
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int idx, nw_idx;
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u8 cs, cs_nw;
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if (spi->controller == new_spi->controller &&
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spi_get_chipselect(spi, 0) == spi_get_chipselect(new_spi, 0))
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return -EBUSY;
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if (spi->controller == new_spi->controller) {
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
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cs = spi_get_chipselect(spi, idx);
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for (nw_idx = 0; nw_idx < SPI_CS_CNT_MAX; nw_idx++) {
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cs_nw = spi_get_chipselect(new_spi, nw_idx);
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if (cs != 0xFF && cs_nw != 0xFF && cs == cs_nw) {
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dev_err(dev, "chipselect %d already in use\n", cs_nw);
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return -EBUSY;
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}
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}
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}
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}
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return 0;
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}
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@ -629,13 +640,32 @@ static int __spi_add_device(struct spi_device *spi)
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{
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struct spi_controller *ctlr = spi->controller;
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struct device *dev = ctlr->dev.parent;
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int status;
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int status, idx, nw_idx;
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u8 cs, nw_cs;
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/* Chipselects are numbered 0..max; validate. */
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if (spi_get_chipselect(spi, 0) >= ctlr->num_chipselect) {
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dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, 0),
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ctlr->num_chipselect);
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return -EINVAL;
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
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/* Chipselects are numbered 0..max; validate. */
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cs = spi_get_chipselect(spi, idx);
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if (cs != 0xFF && cs >= ctlr->num_chipselect) {
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dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, idx),
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ctlr->num_chipselect);
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return -EINVAL;
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}
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}
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/*
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* Make sure that multiple logical CS doesn't map to the same physical CS.
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* For example, spi->chip_select[0] != spi->chip_select[1] and so on.
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*/
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
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cs = spi_get_chipselect(spi, idx);
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for (nw_idx = idx + 1; nw_idx < SPI_CS_CNT_MAX; nw_idx++) {
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nw_cs = spi_get_chipselect(spi, nw_idx);
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if (cs != 0xFF && nw_cs != 0xFF && cs == nw_cs) {
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dev_err(dev, "chipselect %d already in use\n", nw_cs);
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return -EBUSY;
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}
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}
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}
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/* Set the bus ID string */
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@ -647,11 +677,8 @@ static int __spi_add_device(struct spi_device *spi)
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* its configuration.
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*/
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status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check);
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if (status) {
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dev_err(dev, "chipselect %d already in use\n",
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spi_get_chipselect(spi, 0));
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if (status)
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return status;
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}
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/* Controller may unregister concurrently */
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if (IS_ENABLED(CONFIG_SPI_DYNAMIC) &&
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@ -659,8 +686,15 @@ static int __spi_add_device(struct spi_device *spi)
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return -ENODEV;
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}
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if (ctlr->cs_gpiods)
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spi_set_csgpiod(spi, 0, ctlr->cs_gpiods[spi_get_chipselect(spi, 0)]);
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if (ctlr->cs_gpiods) {
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u8 cs;
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
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cs = spi_get_chipselect(spi, idx);
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if (cs != 0xFF)
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spi_set_csgpiod(spi, idx, ctlr->cs_gpiods[cs]);
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}
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}
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/*
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* Drivers may modify this initial i/o setup, but will
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@ -701,6 +735,9 @@ int spi_add_device(struct spi_device *spi)
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struct spi_controller *ctlr = spi->controller;
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int status;
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/* Set the bus ID string */
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spi_dev_set_name(spi);
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mutex_lock(&ctlr->add_lock);
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status = __spi_add_device(spi);
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mutex_unlock(&ctlr->add_lock);
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@ -727,6 +764,7 @@ struct spi_device *spi_new_device(struct spi_controller *ctlr,
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{
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struct spi_device *proxy;
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int status;
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u8 idx;
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/*
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* NOTE: caller did any chip->bus_num checks necessary.
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@ -742,6 +780,18 @@ struct spi_device *spi_new_device(struct spi_controller *ctlr,
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WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias));
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/*
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* Zero(0) is a valid physical CS value and can be located at any
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* logical CS in the spi->chip_select[]. If all the physical CS
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* are initialized to 0 then It would be difficult to differentiate
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* between a valid physical CS 0 & an unused logical CS whose physical
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* CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
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* Now all the unused logical CS will have 0xFF physical CS value & can be
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* ignore while performing physical CS validity checks.
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*/
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
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spi_set_chipselect(proxy, idx, 0xFF);
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spi_set_chipselect(proxy, 0, chip->chip_select);
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proxy->max_speed_hz = chip->max_speed_hz;
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proxy->mode = chip->mode;
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@ -750,6 +800,15 @@ struct spi_device *spi_new_device(struct spi_controller *ctlr,
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proxy->dev.platform_data = (void *) chip->platform_data;
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proxy->controller_data = chip->controller_data;
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proxy->controller_state = NULL;
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/*
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* spi->chip_select[i] gives the corresponding physical CS for logical CS i
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* logical CS number is represented by setting the ith bit in spi->cs_index_mask
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* So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
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* spi->chip_select[0] will give the physical CS.
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* By default spi->chip_select[0] will hold the physical CS number so, set
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* spi->cs_index_mask as 0x01.
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*/
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proxy->cs_index_mask = 0x01;
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if (chip->swnode) {
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status = device_add_software_node(&proxy->dev, chip->swnode);
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@ -942,32 +1001,51 @@ static void spi_res_release(struct spi_controller *ctlr, struct spi_message *mes
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}
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/*-------------------------------------------------------------------------*/
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static inline bool spi_is_last_cs(struct spi_device *spi)
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{
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u8 idx;
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bool last = false;
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
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if ((spi->cs_index_mask >> idx) & 0x01) {
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if (spi->controller->last_cs[idx] == spi_get_chipselect(spi, idx))
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last = true;
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}
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}
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return last;
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}
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static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
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{
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bool activate = enable;
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u8 idx;
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/*
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* Avoid calling into the driver (or doing delays) if the chip select
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* isn't actually changing from the last time this was called.
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*/
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if (!force && ((enable && spi->controller->last_cs == spi_get_chipselect(spi, 0)) ||
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(!enable && spi->controller->last_cs != spi_get_chipselect(spi, 0))) &&
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if (!force && ((enable && spi->controller->last_cs_index_mask == spi->cs_index_mask &&
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spi_is_last_cs(spi)) ||
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(!enable && spi->controller->last_cs_index_mask == spi->cs_index_mask &&
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!spi_is_last_cs(spi))) &&
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(spi->controller->last_cs_mode_high == (spi->mode & SPI_CS_HIGH)))
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return;
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trace_spi_set_cs(spi, activate);
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spi->controller->last_cs = enable ? spi_get_chipselect(spi, 0) : -1;
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spi->controller->last_cs_index_mask = spi->cs_index_mask;
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
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spi->controller->last_cs[idx] = enable ? spi_get_chipselect(spi, 0) : -1;
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spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH;
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if ((spi_get_csgpiod(spi, 0) || !spi->controller->set_cs_timing) && !activate)
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spi_delay_exec(&spi->cs_hold, NULL);
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if (spi->mode & SPI_CS_HIGH)
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enable = !enable;
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if (spi_get_csgpiod(spi, 0)) {
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if (spi_is_csgpiod(spi)) {
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if (!spi->controller->set_cs_timing && !activate)
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spi_delay_exec(&spi->cs_hold, NULL);
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if (!(spi->mode & SPI_NO_CS)) {
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/*
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* Historically ACPI has no means of the GPIO polarity and
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@ -979,26 +1057,38 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
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* ambiguity. That's why we use enable, that takes SPI_CS_HIGH
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* into account.
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*/
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if (has_acpi_companion(&spi->dev))
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gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), !enable);
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else
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/* Polarity handled by GPIO library */
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gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate);
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
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if (((spi->cs_index_mask >> idx) & 0x01) &&
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spi_get_csgpiod(spi, idx)) {
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if (has_acpi_companion(&spi->dev))
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gpiod_set_value_cansleep(spi_get_csgpiod(spi, idx),
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!enable);
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else
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/* Polarity handled by GPIO library */
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gpiod_set_value_cansleep(spi_get_csgpiod(spi, idx),
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activate);
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if (activate)
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spi_delay_exec(&spi->cs_setup, NULL);
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else
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spi_delay_exec(&spi->cs_inactive, NULL);
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}
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}
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}
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/* Some SPI masters need both GPIO CS & slave_select */
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if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
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spi->controller->set_cs)
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spi->controller->set_cs(spi, !enable);
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if (!spi->controller->set_cs_timing) {
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if (activate)
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spi_delay_exec(&spi->cs_setup, NULL);
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else
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spi_delay_exec(&spi->cs_inactive, NULL);
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}
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} else if (spi->controller->set_cs) {
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spi->controller->set_cs(spi, !enable);
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}
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if (spi_get_csgpiod(spi, 0) || !spi->controller->set_cs_timing) {
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if (activate)
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spi_delay_exec(&spi->cs_setup, NULL);
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else
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spi_delay_exec(&spi->cs_inactive, NULL);
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}
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}
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#ifdef CONFIG_HAS_DMA
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@ -2225,8 +2315,8 @@ static void of_spi_parse_dt_cs_delay(struct device_node *nc,
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static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
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struct device_node *nc)
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{
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u32 value;
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int rc;
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u32 value, cs[SPI_CS_CNT_MAX];
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int rc, idx;
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/* Mode (clock phase/polarity/etc.) */
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if (of_property_read_bool(nc, "spi-cpha"))
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@ -2298,14 +2388,53 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
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return 0;
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}
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if (ctlr->num_chipselect > SPI_CS_CNT_MAX) {
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dev_err(&ctlr->dev, "No. of CS is more than max. no. of supported CS\n");
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return -EINVAL;
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}
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/*
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* Zero(0) is a valid physical CS value and can be located at any
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* logical CS in the spi->chip_select[]. If all the physical CS
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* are initialized to 0 then It would be difficult to differentiate
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* between a valid physical CS 0 & an unused logical CS whose physical
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* CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
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* Now all the unused logical CS will have 0xFF physical CS value & can be
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* ignore while performing physical CS validity checks.
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*/
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
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spi_set_chipselect(spi, idx, 0xFF);
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/* Device address */
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rc = of_property_read_u32(nc, "reg", &value);
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if (rc) {
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rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1,
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SPI_CS_CNT_MAX);
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if (rc < 0) {
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dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
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nc, rc);
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return rc;
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}
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spi_set_chipselect(spi, 0, value);
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if (rc > ctlr->num_chipselect) {
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dev_err(&ctlr->dev, "%pOF has number of CS > ctlr->num_chipselect (%d)\n",
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nc, rc);
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return rc;
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}
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if ((of_property_read_bool(nc, "parallel-memories")) &&
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(!(ctlr->flags & SPI_CONTROLLER_MULTI_CS))) {
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dev_err(&ctlr->dev, "SPI controller doesn't support multi CS\n");
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return -EINVAL;
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}
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for (idx = 0; idx < rc; idx++)
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spi_set_chipselect(spi, idx, cs[idx]);
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/*
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* spi->chip_select[i] gives the corresponding physical CS for logical CS i
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* logical CS number is represented by setting the ith bit in spi->cs_index_mask
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* So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
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* spi->chip_select[0] will give the physical CS.
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* By default spi->chip_select[0] will hold the physical CS number so, set
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* spi->cs_index_mask as 0x01.
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*/
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spi->cs_index_mask = 0x01;
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/* Device speed */
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if (!of_property_read_u32(nc, "spi-max-frequency", &value))
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@ -2411,6 +2540,7 @@ struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
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struct spi_controller *ctlr = spi->controller;
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struct spi_device *ancillary;
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int rc = 0;
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u8 idx;
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/* Alloc an spi_device */
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ancillary = spi_alloc_device(ctlr);
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@ -2421,12 +2551,33 @@ struct spi_device *spi_new_ancillary_device(struct spi_device *spi,
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strscpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias));
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/*
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* Zero(0) is a valid physical CS value and can be located at any
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* logical CS in the spi->chip_select[]. If all the physical CS
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* are initialized to 0 then It would be difficult to differentiate
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* between a valid physical CS 0 & an unused logical CS whose physical
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* CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
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* Now all the unused logical CS will have 0xFF physical CS value & can be
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* ignore while performing physical CS validity checks.
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*/
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
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spi_set_chipselect(ancillary, idx, 0xFF);
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/* Use provided chip-select for ancillary device */
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spi_set_chipselect(ancillary, 0, chip_select);
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/* Take over SPI mode/speed from SPI main device */
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ancillary->max_speed_hz = spi->max_speed_hz;
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ancillary->mode = spi->mode;
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/*
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* spi->chip_select[i] gives the corresponding physical CS for logical CS i
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* logical CS number is represented by setting the ith bit in spi->cs_index_mask
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* So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
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* spi->chip_select[0] will give the physical CS.
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* By default spi->chip_select[0] will hold the physical CS number so, set
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* spi->cs_index_mask as 0x01.
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*/
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ancillary->cs_index_mask = 0x01;
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WARN_ON(!mutex_is_locked(&ctlr->add_lock));
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@ -2629,6 +2780,7 @@ struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr,
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struct acpi_spi_lookup lookup = {};
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struct spi_device *spi;
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int ret;
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u8 idx;
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if (!ctlr && index == -1)
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return ERR_PTR(-EINVAL);
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@ -2664,12 +2816,33 @@ struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr,
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return ERR_PTR(-ENOMEM);
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}
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/*
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* Zero(0) is a valid physical CS value and can be located at any
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* logical CS in the spi->chip_select[]. If all the physical CS
|
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* are initialized to 0 then It would be difficult to differentiate
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* between a valid physical CS 0 & an unused logical CS whose physical
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* CS can be 0. As a solution to this issue initialize all the CS to 0xFF.
|
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* Now all the unused logical CS will have 0xFF physical CS value & can be
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* ignore while performing physical CS validity checks.
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*/
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for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
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spi_set_chipselect(spi, idx, 0xFF);
|
||||
|
||||
ACPI_COMPANION_SET(&spi->dev, adev);
|
||||
spi->max_speed_hz = lookup.max_speed_hz;
|
||||
spi->mode |= lookup.mode;
|
||||
spi->irq = lookup.irq;
|
||||
spi->bits_per_word = lookup.bits_per_word;
|
||||
spi_set_chipselect(spi, 0, lookup.chip_select);
|
||||
/*
|
||||
* spi->chip_select[i] gives the corresponding physical CS for logical CS i
|
||||
* logical CS number is represented by setting the ith bit in spi->cs_index_mask
|
||||
* So, for example, if spi->cs_index_mask = 0x01 then logical CS number is 0 and
|
||||
* spi->chip_select[0] will give the physical CS.
|
||||
* By default spi->chip_select[0] will hold the physical CS number so, set
|
||||
* spi->cs_index_mask as 0x01.
|
||||
*/
|
||||
spi->cs_index_mask = 0x01;
|
||||
|
||||
return spi;
|
||||
}
|
||||
|
|
@ -3103,6 +3276,7 @@ int spi_register_controller(struct spi_controller *ctlr)
|
|||
struct boardinfo *bi;
|
||||
int first_dynamic;
|
||||
int status;
|
||||
int idx;
|
||||
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
|
|
@ -3167,7 +3341,8 @@ int spi_register_controller(struct spi_controller *ctlr)
|
|||
}
|
||||
|
||||
/* Setting last_cs to -1 means no chip selected */
|
||||
ctlr->last_cs = -1;
|
||||
for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
|
||||
ctlr->last_cs[idx] = -1;
|
||||
|
||||
status = device_add(&ctlr->dev);
|
||||
if (status < 0)
|
||||
|
|
@ -3892,7 +4067,7 @@ static int __spi_validate(struct spi_device *spi, struct spi_message *message)
|
|||
* cs_change is set for each transfer.
|
||||
*/
|
||||
if ((spi->mode & SPI_CS_WORD) && (!(ctlr->mode_bits & SPI_CS_WORD) ||
|
||||
spi_get_csgpiod(spi, 0))) {
|
||||
spi_is_csgpiod(spi))) {
|
||||
size_t maxsize = BITS_TO_BYTES(spi->bits_per_word);
|
||||
int ret;
|
||||
|
||||
|
|
|
|||
|
|
@ -20,6 +20,9 @@
|
|||
|
||||
#include <uapi/linux/spi/spi.h>
|
||||
|
||||
/* Max no. of CS supported per spi device */
|
||||
#define SPI_CS_CNT_MAX 4
|
||||
|
||||
struct dma_chan;
|
||||
struct software_node;
|
||||
struct ptp_system_timestamp;
|
||||
|
|
@ -132,7 +135,8 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg,
|
|||
* @max_speed_hz: Maximum clock rate to be used with this chip
|
||||
* (on this board); may be changed by the device's driver.
|
||||
* The spi_transfer.speed_hz can override this for each transfer.
|
||||
* @chip_select: Chipselect, distinguishing chips handled by @controller.
|
||||
* @chip_select: Array of physical chipselect, spi->chipselect[i] gives
|
||||
* the corresponding physical CS for logical CS i.
|
||||
* @mode: The spi mode defines how data is clocked out and in.
|
||||
* This may be changed by the device's driver.
|
||||
* The "active low" default for chipselect mode can be overridden
|
||||
|
|
@ -157,8 +161,8 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg,
|
|||
* the device will bind to the named driver and only the named driver.
|
||||
* Do not set directly, because core frees it; use driver_set_override() to
|
||||
* set or clear it.
|
||||
* @cs_gpiod: GPIO descriptor of the chipselect line (optional, NULL when
|
||||
* not using a GPIO line)
|
||||
* @cs_gpiod: Array of GPIO descriptors of the corresponding chipselect lines
|
||||
* (optional, NULL when not using a GPIO line)
|
||||
* @word_delay: delay to be inserted between consecutive
|
||||
* words of a transfer
|
||||
* @cs_setup: delay to be introduced by the controller after CS is asserted
|
||||
|
|
@ -167,6 +171,7 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg,
|
|||
* deasserted. If @cs_change_delay is used from @spi_transfer, then the
|
||||
* two delays will be added up.
|
||||
* @pcpu_statistics: statistics for the spi_device
|
||||
* @cs_index_mask: Bit mask of the active chipselect(s) in the chipselect array
|
||||
*
|
||||
* A @spi_device is used to interchange data between an SPI slave
|
||||
* (usually a discrete chip) and CPU memory.
|
||||
|
|
@ -182,7 +187,7 @@ struct spi_device {
|
|||
struct spi_controller *controller;
|
||||
struct spi_controller *master; /* Compatibility layer */
|
||||
u32 max_speed_hz;
|
||||
u8 chip_select;
|
||||
u8 chip_select[SPI_CS_CNT_MAX];
|
||||
u8 bits_per_word;
|
||||
bool rt;
|
||||
#define SPI_NO_TX BIT(31) /* No transmit wire */
|
||||
|
|
@ -213,7 +218,7 @@ struct spi_device {
|
|||
void *controller_data;
|
||||
char modalias[SPI_NAME_SIZE];
|
||||
const char *driver_override;
|
||||
struct gpio_desc *cs_gpiod; /* Chip select GPIO descriptor */
|
||||
struct gpio_desc *cs_gpiod[SPI_CS_CNT_MAX]; /* Chip select gpio desc */
|
||||
struct spi_delay word_delay; /* Inter-word delay */
|
||||
/* CS delays */
|
||||
struct spi_delay cs_setup;
|
||||
|
|
@ -223,6 +228,13 @@ struct spi_device {
|
|||
/* The statistics */
|
||||
struct spi_statistics __percpu *pcpu_statistics;
|
||||
|
||||
/* Bit mask of the chipselect(s) that the driver need to use from
|
||||
* the chipselect array.When the controller is capable to handle
|
||||
* multiple chip selects & memories are connected in parallel
|
||||
* then more than one bit need to be set in cs_index_mask.
|
||||
*/
|
||||
u32 cs_index_mask : SPI_CS_CNT_MAX;
|
||||
|
||||
/*
|
||||
* Likely need more hooks for more protocol options affecting how
|
||||
* the controller talks to each chip, like:
|
||||
|
|
@ -279,22 +291,33 @@ static inline void *spi_get_drvdata(const struct spi_device *spi)
|
|||
|
||||
static inline u8 spi_get_chipselect(const struct spi_device *spi, u8 idx)
|
||||
{
|
||||
return spi->chip_select;
|
||||
return spi->chip_select[idx];
|
||||
}
|
||||
|
||||
static inline void spi_set_chipselect(struct spi_device *spi, u8 idx, u8 chipselect)
|
||||
{
|
||||
spi->chip_select = chipselect;
|
||||
spi->chip_select[idx] = chipselect;
|
||||
}
|
||||
|
||||
static inline struct gpio_desc *spi_get_csgpiod(const struct spi_device *spi, u8 idx)
|
||||
{
|
||||
return spi->cs_gpiod;
|
||||
return spi->cs_gpiod[idx];
|
||||
}
|
||||
|
||||
static inline void spi_set_csgpiod(struct spi_device *spi, u8 idx, struct gpio_desc *csgpiod)
|
||||
{
|
||||
spi->cs_gpiod = csgpiod;
|
||||
spi->cs_gpiod[idx] = csgpiod;
|
||||
}
|
||||
|
||||
static inline bool spi_is_csgpiod(struct spi_device *spi)
|
||||
{
|
||||
u8 idx;
|
||||
|
||||
for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
|
||||
if (spi_get_csgpiod(spi, idx))
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -399,6 +422,8 @@ extern struct spi_device *spi_new_ancillary_device(struct spi_device *spi, u8 ch
|
|||
* @bus_lock_spinlock: spinlock for SPI bus locking
|
||||
* @bus_lock_mutex: mutex for exclusion of multiple callers
|
||||
* @bus_lock_flag: indicates that the SPI bus is locked for exclusive use
|
||||
* @multi_cs_cap: indicates that the SPI Controller can assert/de-assert
|
||||
* more than one chip select at once.
|
||||
* @setup: updates the device mode and clocking records used by a
|
||||
* device's SPI controller; protocol code may call this. This
|
||||
* must fail if an unrecognized or unsupported mode is requested.
|
||||
|
|
@ -570,6 +595,11 @@ struct spi_controller {
|
|||
#define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */
|
||||
#define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */
|
||||
#define SPI_CONTROLLER_SUSPENDED BIT(6) /* Currently suspended */
|
||||
/*
|
||||
* The spi-controller has multi chip select capability and can
|
||||
* assert/de-assert more than one chip select at once.
|
||||
*/
|
||||
#define SPI_CONTROLLER_MULTI_CS BIT(7)
|
||||
|
||||
/* Flag indicating if the allocation of this struct is devres-managed */
|
||||
bool devm_allocated;
|
||||
|
|
@ -680,7 +710,8 @@ struct spi_controller {
|
|||
bool rt;
|
||||
bool auto_runtime_pm;
|
||||
bool cur_msg_mapped;
|
||||
char last_cs;
|
||||
char last_cs[SPI_CS_CNT_MAX];
|
||||
char last_cs_index_mask;
|
||||
bool last_cs_mode_high;
|
||||
bool fallback;
|
||||
struct completion xfer_completion;
|
||||
|
|
|
|||
|
|
@ -29,7 +29,7 @@ static int cs35l56_hda_spi_probe(struct spi_device *spi)
|
|||
return ret;
|
||||
}
|
||||
|
||||
ret = cs35l56_hda_common_probe(cs35l56, spi->chip_select);
|
||||
ret = cs35l56_hda_common_probe(cs35l56, spi_get_chipselect(spi, 0));
|
||||
if (ret)
|
||||
return ret;
|
||||
ret = cs35l56_irq_request(&cs35l56->base, spi->irq);
|
||||
|
|
|
|||
Loading…
Reference in a new issue